Non-volatile memory with pre-trained model and inference circuit
A non-volatile storage apparatus comprises one or more memory die assemblies, each of which includes an inference circuit positioned in the memory die assembly. The inference circuit is configured to use a pre-trained model (received pre-trained from a source external to the non-volatile storage apparatus and stored in a dedicated block in non-volatile memory) with one or more metrics describing current operation of the non-volatile storage apparatus in order to predict a defect in the non-volatile storage apparatus and perform a countermeasure to preserve host data prior to a non-recoverable failure in the non-volatile storage apparatus due to the defect.
1. A non-volatile storage apparatus, comprising:
a memory die assembly comprising:
a non-volatile memory structure comprising a first set of non-volatile memory cells configured to store host data and a second set of non-volatile memory cells storing a pre-trained model received from a source external to the non-volatile storage apparatus; and
a control circuit connected to the non-volatile memory structure and configured to write to and read from the non-volatile memory structure, the control circuit comprises an inference circuit positioned in the memory die assembly, the inference circuit is configured to use the pre-trained model from the second set of non-volatile memory cells with one or more metrics describing current operation of the non-volatile storage apparatus in order to predict a defect in the non-volatile storage apparatus and perform a countermeasure to preserve the host data prior to a non-recoverable failure in the non-volatile storage apparatus due to the defect.
2. The non-volatile storage apparatus of claim 1 , wherein:
the memory die assembly comprises a memory die; and
the non-volatile memory structure and the inference circuit are both positioned on the memory die.
3. The non-volatile storage apparatus of claim 1 , wherein:
the memory die assembly comprises a memory die bonded to control die;
the non-volatile memory is positioned on the memory die; and
the inference circuit is positioned on the control die.
4. The non-volatile storage apparatus of claim 1 , further comprising:
a memory controller connected to the memory die assembly, the memory controller is configured to gather the one or more metrics describing current operation of the non-volatile storage apparatus and transmit the one or more metrics to the memory die assembly in response to a pre-failure alarm.
5. The non-volatile storage apparatus of claim 1 , wherein:
the second set of non-volatile memory cells include an erase block dedicated to storing the pre-trained model.
6. A non-volatile storage apparatus, comprising:
a memory controller; and
a plurality of memory die assemblies connected to the memory controller, each memory die assembly of the plurality of memory die assemblies includes:
a separate plurality of non-volatile memory cells, and
a separate inference circuit positioned in the respective memory die assembly, the separate inference circuit is configured to use a pre-trained machine learning model with one or more metrics describing current operation of the respective memory die assembly in order to predict a defect in the respective memory die assembly prior to a non-recoverable failure in the respective memory die assembly due to the defect, the non-volatile storage apparatus is configured to perform a countermeasure prior to a non-recoverable failure in the respective memory die assembly due to the defect.
7. The non-volatile storage apparatus of claim 6 , wherein:
each memory die assembly of the plurality of memory die assemblies comprises a separate memory die such that the respective separate plurality of non-volatile memory cells and the respective separate inference circuit are positioned on the separate memory die.
8. The non-volatile storage apparatus of claim 6 , wherein:
each memory die assembly of the plurality of memory die assemblies comprises a separate memory die bonded to separate control die bonded such that the respective separate plurality of non-volatile memory cells and the respective separate inference circuit are positioned on the separate control die.
9. The non-volatile storage apparatus of claim 6 , wherein:
for each memory die assembly of the plurality of memory die assemblies, the separate plurality of non-volatile memory cells includes a first set of non-volatile memory cells configured to store host data and a second set of non-volatile memory cells storing the pre-trained machine learning model received from a source external to the non-volatile storage apparatus.
10. The non-volatile storage apparatus of claim 6 , wherein:
for each memory die assembly of the plurality of memory die assemblies, the separate plurality of non-volatile memory cells store host data; and
the memory controller and the memory die assemblies are configured to perform a countermeasure to preserve the host data prior to the non-recoverable failure in the non-volatile memory structure due to the defect.
11. The non-volatile storage apparatus of claim 6 , wherein:
the memory controller is configured to gather the one or more metrics describing current operation of the respective memory die assembly and transmit the one or more metrics to the respective memory die assembly.
12. The non-volatile storage apparatus of claim 6 , wherein:
the memory controller is configured to gather the one or more metrics describing current operation of the respective memory die assembly and transmit the one or more metrics to the respective memory die assembly in response to a pre-failure alarm.
13. The non-volatile storage apparatus of claim 6 , wherein:
the inference circuit are configured to classify the defect based on level of severity from three or more levels of severity and perform different remedial actions based on the classified level of severity.
14. The non-volatile storage apparatus of claim 6 , wherein:
the memory controller is configured to communicate with a host external to the non-volatile storage apparatus;
for each memory die assembly of the plurality of memory die assemblies, the separate plurality of non-volatile memory cells includes a first set of non-volatile memory cells configured to store host data and a second set of non-volatile memory cells storing the pre-trained machine learning model received from a source external to the non-volatile storage apparatus; and
the memory controller and the memory die assemblies are configured to back up host data that would be affected by the defect and report the defect to the host in response to predicting the defect.
15. A method, comprising:
receiving at a storage system a pre-trained model from a source external to the storage system, the storage system comprises a memory controller connected to multiple memory die assemblies;
storing the pre-trained model in one or more blocks of non-volatile memory cells in the storage system;
triggering a pre-failure alarm in the storage system;
the memory controller gathering one or more metrics describing current operation of the storage system in response to the pre-failure alarm;
the memory controller sending the one or more metrics to a first inference engine circuit on a first memory die assembly of the multiple memory die assemblies;
the first inference engine using the pre-trained model with the one or more metrics to predict a defect in the storage system prior to a non-recoverable failure in the storage system due to the defect; and
performing a countermeasure to preserve host data stored in the storage system prior to a non-recoverable failure in the storage system due to the defect.
16. The method of claim 15 , further comprising:
training the model using data from devices other than the storage system.
17. The method of claim 15 , further comprising:
training the model during a research and development process using data from the research and development process.
18. The method of claim 15 , further comprising:
the memory controller sending the additional metrics to a second inference engine circuit on a second memory die assembly of the multiple memory die assemblies; and
the second inference engine using the pre-trained model with the additional metrics to predict a second defect in the storage system prior to a non-recoverable failure in the storage system due to the second defect.