IP Library › Granted Patent US 11,843,058
Granted Patent B2
US 11,843,058 · App. 17/516,569 · Granted Dec 12, 2023

Transistor structures with a metal oxide contact buffer and a method of fabricating the transistor structures

Inventors: Gilbert Dewey (Hillsboro, OR); Abhishek Sharma (Hillsboro, OR); Van Le (Beaverton, OR); Jack Kavalieros (Portland, OR); Shriram Shivaraman (Hillsboro, OR); Seung Hoon Sung (Portland, OR); Tahir Ghani (Portland, OR); Arnab Sen Gupta (Beaverton, OR); Nazila Haratipour (Hillsboro, OR); Justin Weber (Portland, OR)
Assignee: Intel Corporation
H01L29/7869H01L21/823807H01L27/092H01L29/221H01L29/78696
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Quick Facts
Patent No.
US 11,843,058
App. No.
17/516,569
Granted
Dec 12, 2023
Kind
B2
Abstract

Transistor structures may include a metal oxide contact buffer between a portion of a channel material and source or drain contact metallization. The contact buffer may improve control of transistor channel length by limiting reaction between contact metallization and the channel material. The channel material may be of a first composition and the contact buffer may be of a second composition.

Claims (51)

1. A transistor structure, comprising:

a substrate material;

a channel material of a first composition comprising oxygen and one or more metals, wherein the channel material is over the substrate material and has a lateral length comprising first and second portions separated by an intervening third portion of the channel material;

a gate electrode over, and separated from the substrate material by, the third portion of the channel material;

a gate dielectric material in direct contact with the third portion of the channel material, the gate dielectric material between the gate electrode and the third portion of the channel material;

a source contact metallization coupled with the first portion of the channel material, wherein a first portion of a contact buffer material is between the first portion of the channel material and the source contact metallization; and

a drain contact metallization coupled with the second portion of the channel material, wherein a second portion of the contact buffer material is between the second portion of the channel material and the drain contact metallization, and wherein the contact buffer material is of a second composition comprising oxygen and one or more metals.

2. The transistor structure of claim 1 , wherein:

the first, second and third portions of the channel material are substantially co-planar with each other;

the source contact metallization is co-planar with the gate dielectric material; and

the drain contact metallization is co-planar with the gate dielectric material.

3. The transistor structure of claim 1 , wherein the contact buffer material comprises oxygen and at least one of In, Sn, Ir, Ti, Sb, Zn, or Al.

4. The transistor structure of claim 3 , wherein the channel material and the contact buffer material both comprise In, and the contact buffer material has a greater atomic % of In than the channel material.

5. The transistor structure of claim 4 , wherein the contact buffer material comprises at least one of In, Sn, Ir, or Ti.

6. The transistor structure of claim 4 , wherein the contact buffer material comprises two or more of In, Sn, Ir, Ti, Sb, Zn, or Al.

7. The transistor structure of claim 6 , wherein the contact buffer material comprises In and Sn.

8. The transistor structure of claim 1 , wherein:

the source contact metallization is in direct contact with the first portion of the contact buffer material and the first portion of the contact buffer material is in direct contact with the second portion of channel material; and

the drain contact metallization is in direct contact with the second portion of the contact buffer material and the second portion of the contact buffer material is in direct contact with the third portion of channel material.

9. The transistor structure of claim 1 , wherein the first and second portions of contact buffer material each comprise a liner laterally separating the source and drain contact metallization from the gate dielectric material.

10. An integrated circuit (IC) structure, comprising:

a plurality of complementary metal-oxide-semiconductor (CMOS) field effect transistor (FET) structures, wherein individual ones of the CMOS FET structures comprise a Group IV crystalline material; and

a plurality of back-end transistor structures over the CMOS FET structures, with one or more levels of interconnect metallization therebetween, wherein individual ones of the back-end transistor structures comprise:

a channel material over the levels of interconnect metallization, the channel material of a first composition comprising oxygen and one or more metals, wherein the channel material has a lateral length comprising first and second portions separated by an intervening third portion of the channel material;

a gate electrode over, and separated from the levels of interconnect metallization by, the third portion of the channel material;

a gate dielectric material in direct contact with the third portion of the channel material, the gate dielectric material between the gate electrode and the third portion of the channel material;

a source contact metallization coupled with the first portion of the channel material, wherein a first portion of a contact buffer material is between the first portion of the channel material and the source contact metallization; and

a drain contact metallization coupled with the second portion of the channel material, wherein a second portion of the contact buffer material is between the second portion of the channel material and the drain contact metallization, and wherein the contact buffer material is of a second composition comprising oxygen and one or more metals.

11. The IC structure of claim 10 , wherein:

the channel material comprises a non-planar body of the first composition;

a top surface of the first portion and the second portion of the contact buffer material is coplanar with a top surface of the non-planar body; and

the first portion and the second portion of the contact buffer material are in direct contact with a sidewall of the non-planar body.

12. The IC structure of claim 11 , wherein the first portion of the contact buffer material is adjacent to a sidewall of the source contact metallization and the top surface of the first portion of the contact buffer material is co-planar with a top surface of the source contact metallization, and wherein the second portion of the contact buffer material is adjacent to a sidewall of the drain contact metallization and the top surface of the second portion of the contact buffer material is co-planar with a top surface of the drain contact metallization.

13. A method of fabricating a transistor structure, the method comprising:

forming a channel material over a substrate, wherein the channel material has a first composition comprising oxygen and one or more metals;

forming a gate dielectric material in direct contact with a first portion of the channel material, wherein the first portion of the channel material is between a second and third portion of the channel material;

forming a gate electrode over, and separated from the substrate by, the gate dielectric material and the first portion of the channel material;

forming a first portion of a contact buffer material in direct contact with the second portion of the channel material, and a second portion of the contact buffer material in direct contact with the third portion of the channel material, wherein the contact buffer material has a second composition comprising oxygen and one or more metals;

forming a source contact metallization in direct contact with the first portion of the contact buffer material; and

forming a drain contact metallization in direct contact with the second portion of the contact buffer material.

14. The method of claim 13 , wherein forming the source contact metallization and the drain contact metallization further comprises:

depositing a second dielectric material over the contact buffer material;

exposing the first and second portions of the contact buffer material by patterning vias through the second dielectric material;

depositing the source contact metallization into a first of the vias; and

depositing the drain contact metallization into a second of the vias.

15. The method of claim 14 , wherein forming the first and second portions of the contact buffer material comprises at least one of physical vapor deposition, chemical vapor deposition, or atomic layer deposition.

16. The method of claim 15 , wherein forming the first and second portions of the contact buffer material comprises depositing a compound of oxygen and at least one of In, Sn, Ir, Ti, Sb, Zn, or Al.

17. The method of claim 16 , wherein:

forming the channel material comprises depositing a compound of oxygen and at least In, and

forming the contact buffer material comprises depositing a compound of oxygen and at least In at a greater atomic % of In than for the channel material.

18. The method of claim 16 , wherein forming the contact buffer material comprises depositing a compound of In and Sn.

Continuity (2)
Continuation 16455581 · Jun 27, 2019
Related Publication 20220052200A1 · Feb 17, 2022
Cited By (2)
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