Self-guided placement of memory device component packages
A data storage device includes a substrate and one or more grid array integrated circuit packages. The grid array integrated circuit package includes at least one self-alignment pin having a tapered shape. The substrate includes one or more connection pads to receive the grid array integrated circuit packages. The connection pads include at least one self-alignment receptacle that receives the self-alignment pins such that the grid array integrated circuit packages maintain an alignment with an associated connection pad of the substrate.
1. A data storage device, comprising:
a substrate; and
an integrated circuit package including:
a grid array, and
at least one self-correcting alignment pin having a tapered portion; and
wherein the substrate includes a connection pad interfacing with the integrated circuit package, the connection pad including at least one self-correcting alignment receptacle receiving the at least one self-correcting alignment pin,
wherein the self-correcting alignment receptacle has a tapered shape complementary to a shape of the tapered portion of the at least one self-correcting alignment pin, and
wherein the self-correcting alignment receptacle does not penetrate completely through the substrate.
2. The data storage device of claim 1 , wherein the tapered portion is a circular cone taper.
3. The data storage device of claim 1 , wherein the self-correcting alignment pin is received within the self-correcting alignment receptacle such that an alignment between the integrated circuit package and the connection pad is maintained during a reflow operation.
4. The data storage device of claim 1 , wherein the grid array comprises a ball grid array.
5. The data storage device of claim 1 , wherein the self-correcting alignment pin is electrically connected to the self-correcting alignment receptacle.
6. The data storage device of claim 1 , wherein the self-correcting alignment receptacle is electrically coupled to a ground potential connection of the substrate.
7. An integrated circuit device, comprising:
a package having a quadrilateral shape;
a grid array positioned on a first side of the package, the grid array including a plurality of connection points;
a first self-correcting alignment pin on the first side of the package; and
a second self-correcting alignment pin on the first side of the package,
wherein the first self-correcting alignment pin and the second self-correcting alignment pin each have a conically shaped tapered portion; and
wherein the first self-correcting alignment pin and the second self-correcting alignment pin are positioned opposite the grid array along a diagonal axis bisecting the package, and
wherein the integrated circuit device is coupled to a substrate, the substrate comprising a connection pad configured to interface with the integrated circuit device; and
wherein the first self-correcting alignment pin and the second self-correcting alignment pin interface with a first self-correcting alignment receptacle and a second self-correcting alignment receptacle, respectively, of the connection pad,
wherein the first self-correcting alignment receptacle and the second self-correcting alignment receptacle have a tapered shape complementary to the conically shaped tapered portion of the first self-correcting alignment pin and the second self-correcting alignment pin, and
wherein the first self-correcting alignment and the second self-correcting alignment receptacles do not penetrate completely through the substrate.
8. The integrated circuit device of claim 7 , wherein the first self-correcting alignment pin is received within the first self-correcting alignment receptacle and the second self-correcting alignment pin is received within the second self-correcting alignment receptacle such that the integrated circuit device maintains an alignment with the connection pad.
9. The integrated circuit device of claim 7 , wherein the grid array is one of a ball grid array, a line grid array, or a pin grid array.
10. The integrated circuit device of claim 7 , wherein the conically shaped tapered portion is a right circular cone tapered shape.
11. An electronic assembly, comprising:
a printed circuit board including a connection pad; and
an integrated circuit package having a grid array;
wherein the integrated circuit package includes a first self-correcting alignment pin and a second self-correcting alignment pin that have a tapered portion, and
wherein the connection pad is interfaced with the grid array, the connection pad including a first self-correcting alignment receptacle receiving the first self-correcting alignment pin and a second self-correcting alignment receptacle receiving the second self-correcting alignment pin, and
wherein the first self-correcting alignment pin is received within the first self-correcting alignment receptacle and the second self-correcting alignment pin is received within the second self-correcting alignment receptacle such that the grid array integrated circuit package maintains an alignment with the connection pad,
wherein the first self-correcting alignment receptacle includes a tapered shape complementary with the tapered portion of the first self-correcting alignment pin and the second self-correcting alignment receptacle includes a tapered shape complementary with the tapered portion of the second self-correcting alignment pin;
and wherein the first self-correcting alignment receptacle and the second self-correcting alignment receptacle do not penetrate completely through a substrate of the printed circuit board.
12. The electronic assembly of claim 11 , wherein the electronic assembly is a data storage device.
13. The electronic assembly of claim 11 , wherein the tapered portion is a circular cone shaped tapered portion.
14. The electronic assembly of claim 11 , wherein the first self-correcting alignment pin and the second self-correcting alignment pin are positioned opposite the grid array along a diagonal axis bisecting the package.
15. The electronic assembly of claim 11 , wherein at least one of:
the first self-correcting alignment pin is electrically connected to the first self-correcting alignment receptacle, or
the second self-correcting alignment pin is electrically connected to the second self-correcting alignment receptacle.
16. The electronic assembly of claim 11 , wherein the grid array is one of a ball grid array, a line grid array, or a pin grid array.