Method for manufacturing semiconductor device having chip stacked and molded
A semiconductor device includes an insulating layer, a conductive member provided inside the insulating layer, a chip disposed on a first surface of the insulating layer and connected to the conductive member, and an electrode connected to the conductive member via a barrier layer. A resistivity of the barrier layer is higher than a resistivity of the conductive member. At least a portion of the electrode protrudes from a second surface of the insulating layer.
1. A method for manufacturing a semiconductor device, comprising:
forming a release layer, a first barrier layer, a conductive layer, and a second barrier layer on a support substrate;
forming a first insulating layer on the second barrier layer, a first opening being formed in the first insulating layer;
forming a second opening in the second barrier layer by etching using the first insulating layer as a mask, the second opening communicating with the first opening;
forming a first electrode inside the second opening and inside a lower portion of the first opening;
forming a third barrier layer on an inner surface of an upper portion of the first opening;
forming a first via inside an upper portion of the first opening and forming an interconnect on the first insulating layer, a resistivity of the interconnect being lower than a resistivity of the third barrier layer;
forming a second insulating layer on the interconnect, a third opening being formed in the second insulating layer;
forming a second via inside the third opening, the second via being connected to the interconnect;
forming a second electrode on the second via, the second electrode being connected to the second via;
connecting a chip to the second electrode;
removing the support substrate by removing the release layer; and
removing the first barrier layer, the conductive layer, and the second barrier layer.
2. The method according to claim 1 , further comprising bonding a bump to the first electrode.
3. The method according to claim 1 , wherein the forming of the first electrode includes performing electroplating via the conductive layer.
4. The method according to claim 1 , wherein the forming of the first via and the interconnect includes performing electroplating via the conductive layer.