Metal chalcogenide transistors with defected channel transition layer
A metal chalcogenide material layer of lower quality provides a transition between a metal chalcogenide material layer of higher quality and a gate insulator material that separates the metal chalcogenide material layers from a gate electrode of a metal-oxide semiconductor field effect transistor (MOSFET) structure. Gate insulator material may be more readily initiated and/or or precisely controlled to a particular thickness when formed on lower quality metal chalcogenide material. Accordingly, such a material stack may be integrated into a variety of transistor structures, including multi-gate, multi-channel nanowire or nanosheet transistor structures.
1 . A transistor structure comprising:
a first crystalline material layer comprising primarily a first metal and a first chalcogen;
a second crystalline material layer in contact with the first crystalline material layer, wherein the second crystalline material layer comprises primarily a second metal and a second chalcogen, and wherein the second crystalline material layer comprises smaller crystal grains than are present within the first crystalline material layer;
a gate insulator in contact with the second crystalline material layer, wherein the gate insulator comprises primarily a third metal and oxygen;
a gate electrode separated from the first crystalline material layer by at least the gate insulator and the second crystalline material layer; and
a source terminal and a drain terminal coupled to the first crystalline material layer.
2 . The transistor structure of claim 1 , wherein the second crystalline material layer has a higher density of dislocation defects than the first crystalline material layer.
3 . The transistor structure of claim 1 , wherein:
the first crystalline material layer is monocrystalline, having no grain boundaries, over a distance spanned by the gate electrode; and
the second crystalline material layer is polycrystalline, having at least one grain boundary, over the distance spanned by the gate electrode.
4 . The transistor structure of claim 3 , wherein the first crystalline material layer has a first crystal orientation, and the second crystalline material layer has the first crystal orientation.
5 . The transistor structure of claim 1 , wherein:
the first metal and the first chalcogen have a first stoichiometry; and
the second metal and the second chalcogen have a second stoichiometry, different than the first.
6 . The transistor structure of claim 5 , wherein the second crystalline material layer comprises more oxygen than the first crystalline material layer.
7 . The transistor structure of claim 6 , wherein:
the first crystalline material layer has a composition of MX n , with M being the metal, X the chalcogen and n>1; and
the second crystalline material layer has a composition of MX p O 1-p , with M being the metal, X the chalcogen and 0<p<1.
8 . The transistor structure of claim 1 , wherein the first metal and the second metal are the same.
9 . The transistor structure of claim 8 , wherein the first metal and second metal are both molybdenum, tungsten or chromium.
10 . The transistor structure of claim 8 , wherein the first chalcogen and the second chalcogen are the same.
11 . The transistor structure of claim 10 , wherein:
the first chalcogen and the second chalcogen are both S or Se; and
the gate insulator comprises Hf.
12 . A transistor structure comprising:
a gate electrode coupled to a channel region of the transistor structure, wherein the channel region comprises a monocrystalline layer comprising a first metal chalcogenide material, wherein the monocrystalline layer has a composition of MX n , with M being a metal, X a chalcogen, and n>1;
a polycrystalline layer in contact with the monocrystalline layer, the polycrystalline layer comprising a second metal chalcogenide material and having one or more grain boundaries that originate within the polycrystalline layer, and wherein the polycrystalline layer has a composition of MX p O 1-p , with M being the metal, X the chalcogen, and 0<p<1;
a gate insulator between the gate electrode and the polycrystalline layer;
a source material coupled to a first end of the monocrystalline layer; and
a drain material coupled to a second end of the monocrystalline layer.