Variable length ECC code according to value length in NVMe key value pair devices
A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to determine an error correction code (ECC) code length for KV pair data and/or an ECC code rate for the KV pair data, where the ECC code length and the ECC code rate are selected according to a value length and decoding capability of the KV pair data, generate ECC parity based on the selecting, and program the KV pair data and the generated ECC parity to the memory device.
1. A data storage device, comprising:
a memory device; and
a controller coupled to the memory device, the controller configured to:
determine an error correction code (ECC) code length for key value (KV) pair data and/or an ECC code rate for the KV pair data, wherein the ECC code length and the ECC code rate are selected according to a value length of the KV pair data and a correction capability associated with the KV pair data, and wherein the correction capability is based on a detected pattern of the KV pair data;
generate ECC parity based on the selecting; and
program the KV pair data and the generated ECC parity to the memory device.
2. The data storage device of claim 1 , wherein all KV pair data is associated with an equal correction capability.
3. The data storage device of claim 2 , wherein the correction capability associated with the KV pair data is independent of the value length of the KV pair data.
4. The data storage device of claim 1 , wherein the controller is further configured to select the ECC code rate based on a relative performance (RP) associated with the KV pair data and the value length, and wherein the RP indicates a location of the memory device to store the KV pair data based on a health metric of the location.
5. The data storage device of claim 4 , wherein the RP comprises a first tier, a second tier, a third tier, and a fourth tier, wherein the first tier has a better performance than the second tier, wherein the second tier has a better performance than the third tier, and wherein the third tier has a better performance than the fourth tier.
6. The data storage device of claim 1 , wherein the controller is further configured to receive KV pair data from a host device.
7. The data storage device of claim 6 , wherein the received KV pair data includes the value length.
8. The data storage device of claim 1 , wherein a first size of the programmed KV pair data and the generated ECC parity is less than a second size of the KV pair data and the ECC parity generated without the determining.
9. The data storage device of claim 8 , wherein a third size is the second size minus the first size, and wherein the third size is used for additional overprovisioning.
10. The data storage device of claim 8 , wherein a third size is the second size minus the first size, and wherein the third size is used for data shaping or controller metadata.
11. The data storage device of claim 8 , wherein a third size is the second size minus the first size, and wherein the third size is used for content metadata.
12. A data storage device, comprising:
a memory device; and
a controller coupled to the memory device, the controller configured to:
determine an error correction code (ECC) code length for key value (KV) pair data and/or an ECC code rate for the KV pair data, wherein the ECC code length and the ECC code rate are selected according to a value length and a relative performance (RP) associated with the KV pair data, and wherein the RP indicates a location of the memory device to store the KV pair data based on a health metric of the location;
generate ECC parity based on the selecting; and
program the KV pair data and the generated ECC parity to the memory device.
13. The data storage device of claim 12 , wherein the KV pair data is received from a host device, and wherein the KV pair data includes the value length and the RP of the KV pair data.
14. The data storage device of claim 12 , wherein the programmed KV pair data and generated ECC parity is in a size less than the KV pair data and the ECC parity generated without the determining.
15. The data storage device of claim 12 , wherein values of the KV pair data spans across one or more wordlines.
16. The data storage device of claim 15 , wherein the controller is further configured to read the values of the KV pair data sequentially.
17. The data storage device of claim 12 , wherein a first amount of the generated ECC parity is less than a second amount of generated ECC parity, and wherein the second amount of generated ECC parity is generated without the determining.
18. A data storage device, comprising:
memory means; and
a controller coupled to the memory means, the controller configured to:
select an error correction code (ECC) rate and/or an ECC length based on one or more of a value length, a relative performance (RP), and a correction capability associated with a key value (KV) pair data, wherein the correction capability is based on a detected pattern of the KV pair data, and wherein the RP indicates a location of the memory device to store the KV pair data based on a health metric of the location.
19. The data storage device of claim 18 , wherein a first value length is greater than a second value length, and wherein a first correction capability associated with the first value length is greater than a second correction capability associated with the second value length.
20. The data storage device of claim 18 , wherein the controller is further configured to store content metadata, and wherein the content metadata comprises features of an image document and/or data of a text document.