IP Library Granted Patent US 11,735,620
Granted Patent B2
US 11,735,620 · App. 17/564,666 · Granted Aug 22, 2023

Solid-state imaging device having optical black region, method of manufacturing the same, and electronic apparatus

Inventors: Kazufumi Watanabe (Tokyo, JP); Yasushi Maruyama (Kanagawa, JP)
Assignee: SONY GROUP CORPORATION
H01L27/14645H01L27/1463H01L27/1464H01L27/14612H01L27/14621H01L27/14623H01L27/14627H01L27/14629H01L27/14632H01L27/14636H01L27/14685H01L27/14687H01L31/0216H01L31/18H04N25/62H01L21/7806H01L31/02162H01L31/1804Y02P70/50
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Quick Facts
Patent No.
US 11,735,620
App. No.
17/564,666
Granted
Aug 22, 2023
Kind
B2
Abstract

A solid-state imaging device includes: a pixel region in which a plurality of pixels composed of a photoelectric conversion section and a pixel transistor is arranged; an on-chip color filter; an on-chip microlens; and a multilayer interconnection layer in which a plurality of layers of interconnections is formed through an interlayer insulating film. The solid-state imaging device further includes a light-shielding film formed through an insulating layer in a pixel boundary of a light receiving surface in which the photoelectric conversion section is arranged.

Claims (40)

1. A light detecting device, comprising:

a semiconductor substrate including a first side as a light incident side and a second side opposite to the first side;

photoelectric conversion regions disposed in the semiconductor substrate;

an element isolation region disposed in the semiconductor substrate,

wherein the photoelectric conversion regions are separated by the element isolation region, and

wherein the element isolation region includes a p-type semiconductor region;

a wiring layer disposed under the second side of the semiconductor substrate; and

a metal film disposed above the first side of the semiconductor substrate,

wherein the metal film contacts the p-type semiconductor region in an optical black level region disposed in the semiconductor substrate.

2. The light detecting device according to claim 1 , wherein the element isolation region includes a trench.

3. The light detecting device according to claim 2 , wherein the trench extends from the second side to the first side of the semiconductor substrate.

4. The light detecting device according to claim 2 , wherein an insulation film is disposed in the trench.

5. The light detecting device according to claim 1 , wherein the element isolation region is configured to apply a voltage.

6. The light detecting device according to claim 1 , wherein the optical black level region is an area outside an effective pixel region.

7. The light detecting device according to claim 6 , wherein the semiconductor substrate is covered by the metal film in the optical black level region.

8. The light detecting device according to claim 1 , further comprising:

an insulation film disposed between the metal film and the semiconductor substrate.

9. The light detecting device according to claim 8 , wherein the insulation film includes hafnium oxide.

10. The light detecting device according to claim 1 , wherein the metal film includes a barrier metal layer.

11. The light detecting device according to claim 10 , wherein the barrier metal layer includes titanium.

12. The light detecting device according to claim 1 , wherein the metal film includes tungsten.

13. The light detecting device according to claim 1 , wherein the wiring layer includes a gate electrode and a plurality of interconnection layers provided beneath the gate electrode.

14. The light detecting device according to claim 1 , wherein the metal film is connected to ground potential.

15. An electronic apparatus, comprising:

an optical lens;

a signal processing circuit; and

a light detecting device including:

a semiconductor substrate including a first side as a light incident side and a second side opposite to the first side;

photoelectric conversion regions disposed in the semiconductor substrate;

an element isolation region disposed in the semiconductor substrate,

wherein the photoelectric conversion regions are separated by the element isolation region, and

wherein the element isolation region includes a p-type semiconductor region;

a wiring layer disposed under the second side of the semiconductor substrate; and

a metal film disposed above the first side of the semiconductor substrate,

wherein the metal film contacts the p-type semiconductor region in an optical black level region disposed in the semiconductor substrate.

16. The electronic apparatus according to claim 15 , wherein the element isolation region includes a trench.

17. The electronic apparatus according to claim 16 , wherein the trench extends from the second side to the first side of the semiconductor substrate.

18. The electronic apparatus according to claim 16 , wherein an insulation film is disposed in the trench.

19. The electronic apparatus according to claim 15 , wherein the optical black level region is an area outside an effective pixel region.

20. The electronic apparatus according to claim 19 , wherein the semiconductor substrate is covered by the metal film in the optical black level region.

Assignments (2)
CHANGE OF NAME Recorded Jan 25, 2022
From: SONY CORPORATION
To: SONY GROUP CORPORATION
Reel/Frame 058842/0861 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2021
From: WATANABE, KAZUFUMI; MARUYAMA, YASUSHI
To: SONY CORPORATION
Reel/Frame 058599/0627 →
Priority Claims (2)
JP 2009-028822 · Feb 10, 2009 · national
JP 2009-148088 · Jun 22, 2009 · national
Continuity (7)
Continuation 16178454 · Nov 1, 2018
Continuation 15647093 · Jul 11, 2017
Continuation 15394241 · Dec 29, 2016
Continuation 14942691 · Nov 16, 2015
Continuation 14563036 · Dec 8, 2014
Division 12699488 · Feb 3, 2010
Related Publication 20220123041A1 · Apr 21, 2022