Patent Application

App. No. 17/567,098

Abstract

Claims (31)

1 . An apparatus comprising

a memory; and

a controller coupled to the memory, the controller comprising at least one internal hardware resource that is partitioned such that readiness states for individual partitions of the internal hardware resource are individually controllable, the controller configured to:

determine a value for a parameter that corresponds to upcoming workload for the controller;

compare the parameter value to a set of thresholds; and

control the readiness states for the partitions of the at least one internal hardware resource based on the comparison of the parameter value to the set of thresholds.

2 . The apparatus of claim 1 , wherein the at least one internal hardware resource comprises an internal memory.

3 . The apparatus of claim 1 , wherein the controller controls the readiness states by controlling a power state for at least one of the partitions.

4 . The apparatus of claim 1 , wherein the controller controls the readiness states by controlling a standby state for at least one of the partitions.

5 . The apparatus of claim 1 , wherein the controller controls the readiness states by gating a clock signal for at least one of the partitions.

6 . The apparatus of claim 1 , wherein the set of thresholds comprises at least a first subset of thresholds corresponding to readiness states for a first partition and a second subset of thresholds corresponding to readiness states for a second partition, the second subset different from the first subset.

7 . The apparatus of claim 1 , wherein the controller changes readiness states for the partitions by one state at a time within an ordered sequence of states.

8 . The apparatus of claim 1 , wherein the set of thresholds includes a subset of thresholds to increase readiness states and a subset of thresholds to decrease readiness states that differs from the subset of thresholds to increase readiness states.

9 . The apparatus of claim 1 , wherein the controller is further configured to change the set of thresholds over time based on usage history for the internal hardware resource.

10 . The apparatus of claim 1 , wherein the at least one internal hardware resource comprises an internal memory and the controller is configured to write to the internal memory in lowest available address order.

11 . The apparatus of claim 1 , wherein the parameter comprises a command queue depth.

12 . A method comprising:

receiving and queueing commands for a memory in a command queue of a controller for the memory, the controller comprising an internal memory that is partitioned such that power-saving states for individual partitions of the internal memory are individually controllable;

determining a queue depth for the command queue; and

controlling the power-saving states for the partitions of the internal memory based on the queue depth.

13 . The method of claim 12 , wherein controlling the power-saving states comprises controlling a power state for at least one of the partitions.

14 . The method of claim 12 , wherein controlling the power-saving states comprises controlling a standby state for at least one of the partitions.

15 . The method of claim 12 , wherein controlling the power-saving states comprises gating a clock signal for at least one of the partitions.

16 . The method of claim 12 , wherein controlling the power-saving states comprises setting different partitions to different readiness states.

17 . The method of claim 12 , wherein controlling the power-saving states comprises changing readiness states for the partitions by one state at a time within an ordered sequence of states.

18 . The method of claim 12 , wherein controlling the power-saving states comprises increasing a power-saving state based on comparing the queue depth to a first threshold and decreasing the power-saving state based on comparing the queue depth to a second threshold.

19 . The method of claim 12 , wherein controlling the power-saving states comprises dynamically changing power-saving thresholds over time based on usage history for the internal memory.

20 . An apparatus comprising:

a memory controller including at least one internal hardware resource, wherein the internal hardware resource is partitioned such that readiness states for individual partitions of the internal hardware resource are individually controllable;

means for determining a value for a parameter that corresponds to upcoming workload for the memory controller; and

means for changing the readiness states for the partitions of the at least one internal hardware resource based on changes to the value of the parameter.

Assignments (9)