IP Library Granted Patent US 12,300,557
Granted Patent B2
US 12,300,557 · App. 17/572,344 · Granted May 13, 2025

Semiconductor device including differential height PCB

Inventors: Nandha Kumar Mohanraj (Bengaluru, IN); Jegathese Dhanachandra Prakash (Bengaluru, IN); Tamilselvan Krishnamoorthy (Bengaluru, IN)
Assignee: Sandisk Technologies, Inc.
H01L23/13H01L23/3121H01L23/49822H01L25/0652H01L2225/06506H01L2225/0651H01L2225/06548H01L2225/06562
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Quick Facts
Patent No.
US 12,300,557
App. No.
17/572,344
Granted
May 13, 2025
Kind
B2
Abstract

A semiconductor device has a differential height substrate including a first section and a second section thinner than the first section. The first section may include contact fingers for electrically coupling the semiconductor device to a connector in a slot of a host device. The second section may include one or more semiconductor dies and other components. Mold compound may encapsulate the semiconductor dies and other components, leaving the contact fingers in the first section of the substrate exposed. A second layer of mold compound may also be applied to a second, uniformly planar surface of the differential height substrate opposite a surface including the one or more semiconductor dies.

Claims (37)

1. A semiconductor device, comprising:

a substrate comprising:

a first section comprising contact fingers configured to electrically couple the semiconductor device to a connector of a host device, the first section having a first thickness, and

a second section having a second thickness thinner than the first thickness;

one or more semiconductor dies mounted on the second section of the substrate and electrically coupled to the contact fingers in the first section of the substrate; and

mold compound encapsulating the one or more semiconductor dies on the second section, the mold compound leaving the contact fingers uncovered and exposed;

wherein the substrate comprises a first flat planar surface and a second surface, opposed to the first surface, comprising differential heights of the first and second sections.

2. The semiconductor device of claim 1 , wherein the first section is contiguous with the second section.

3. The semiconductor device of claim 1 , wherein the contact fingers and one or more semiconductor dies are mounted on a same side of the substrate.

4. The semiconductor device of claim 1 , wherein the mold compound comprises a first layer of mold compound applied to a first side of the substrate, and a second layer of mold compound applied to a second side of the substrate opposed to the first side.

5. The semiconductor device of claim 1 , wherein the contact fingers are provided on the first section on the second surface of the substrate.

6. The semiconductor device of claim 1 , wherein the one or more semiconductor dies are provided on the second section on the second surface of the substrate.

7. The semiconductor device of claim 1 , wherein the mold compound comprises a first layer of mold compound applied to the second surface of the substrate, and a second layer of mold compound applied to the first surface of the substrate.

8. The semiconductor device of claim 1 , wherein the semiconductor device is a Secure Digital memory card.

9. The semiconductor device of claim 8 , wherein the Secure Digital memory card is lidless.

10. The semiconductor device of claim 9 , wherein the first section has a thickness of 1.2±0.15 mm, the second section has a thickness of 0.4±0.15 mm and the mold compound has a thickness of 1.5±0.15 mm.

11. The semiconductor device of claim 10 , wherein the mold compound comprises a first layer of mold compound applied to a first side of the substrate, and a second layer of mold compound applied to a second side of the substrate opposed to the first side, the second layer of mold compound having a thickness of 0.2±0.15 mm.

12. A semiconductor device, comprising:

a differential height substrate, comprising:

a first flat planar surface,

a second surface opposed to the first surface, the second surface comprising first and second sections comprising differential heights;

contact fingers provided on the second surface in the first section, the contact fingers configured to electrically couple the semiconductor device to contact pins in a host device;

one or more semiconductor dies mounted on the second surface in the second section and electrically coupled to the contact fingers in the first section of the differential height substrate; and

mold compound on the second surface in the second section encapsulating the one or more semiconductor dies.

13. The semiconductor device of claim 12 , wherein the one or more semiconductor dies comprise a plurality of flash memory dies stacked on the second surface in the second section of the differential height substrate.

14. The semiconductor device of claim 13 , wherein the one or more semiconductor dies further comprise a controller die on the second surface in the second section of the differential height substrate.

15. The semiconductor device of claim 12 , wherein the semiconductor device is a lidless Secure Digital memory card.

16. The semiconductor device of claim 15 , wherein the mold compound comprises a first layer of mold compound, and a second layer of mold compound applied to the first planar surface of the differential height substrate.

17. The semiconductor device of claim 16 , wherein the differential height substrate at the second section, together with the first and second layers of mold compound have a combined thickness of 2.1±0.15 mm.

18. The semiconductor device of claim 17 , wherein the differential height substrate at the first section, together with the second layer of mold compound has a combined thickness of 1.4=0.15 mm.

19. A semiconductor device configured to fit within a slot of a host device, comprising:

one or more semiconductor dies;

signal carrier means for transferring signals between the one or more semiconductor dies and the host device, the signal carrier means comprising:

a first section comprising contact fingers configured to electrically couple the semiconductor device to contact pins in the host device, the first section having a first thickness, and

a second section having a second thickness less than the first thickness; and

mold compound encapsulating the one or more semiconductor dies on the second section, the mold compound leaving the contact fingers uncovered and exposed;

wherein the signal carrier means comprises a first flat planar surface and a second surface, opposed to the first surface, comprising differential heights of the first and second sections.

Assignments (8)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 10, 2022
From: MOHANRAJ, NANDHA KUMAR; PRAKASH, JEGATHESE DHANACHANDRA; KRISHNAMOORTHY, TAMILSELVAN
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058610/0453 →
Continuity (1)
Related Publication 20230223307A1 · Jul 13, 2023
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