IP Library › Granted Patent US 12,294,019
Granted Patent B2
US 12,294,019 · App. 17/582,710 · Granted May 6, 2025

Method for manufacturing nitride semiconductor device and nitride semiconductor device

Inventors: Ryo Tanaka (Tokyo, JP); Yuki Ohuchi (Tokyo, JP); Katsunori Ueno (Nagano, JP); Shinya Takashima (Tokyo, JP)
Assignee: FUJI ELECTRIC CO., LTD.
H01L29/2003H01L21/02389H01L21/26546
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Quick Facts
Patent No.
US 12,294,019
App. No.
17/582,710
Granted
May 6, 2025
Kind
B2
Abstract

A method for manufacturing a nitride semiconductor device including: forming N-type regions in a nitride semiconductor layer; implanting ions of an acceptor element into a region sandwiched by the N-type regions in the nitride semiconductor layer; and forming a P-type region sandwiched by the N-type regions by subjecting the nitride semiconductor layer to heat treatment and activating the acceptor element. The forming the N-type regions includes implanting ions of a donor element to the nitride semiconductor layer such that concentration of the donor element in the N-type regions is equal to or greater than concentration of the acceptor element in the P-type region. The implanting ions of the acceptor element includes implanting ions of the acceptor element such that concentration of the acceptor element in the P-type region is 1×10 19 cm −3 or more and 1×10 21 cm −3 or less.

Claims (48)

1. A method for manufacturing a nitride semiconductor device comprising:

forming N-type regions in a nitride semiconductor layer;

implanting ions of an acceptor element into a region sandwiched by the N-type regions on both sides in the nitride semiconductor layer; and

forming a P-type region sandwiched by the N-type regions on both sides by subjecting the nitride semiconductor layer in which the N-type regions are formed and into which ions of the acceptor element are implanted to heat treatment and activating the acceptor element,

wherein, in the forming the N-type regions,

the method implants ions of a donor element to the nitride semiconductor layer at a high concentration in such a way that concentration of the donor element in the N-type regions has a value equal to or greater than concentration of the acceptor element in the P-type region, and

in the implanting ions of the acceptor element,

the method implants ions of the acceptor element in such a way that:

concentration of the acceptor element in the P-type region is 1×10 19 cm −3 or more and 1×10 21 cm −3 or less; and

a region into which the ions of the acceptor element is implanted partially overlaps the N-type regions adjacent to the P-type region, and

the P-type region includes:

a first region; and

second regions each of which is located between the first region and one of the N-type regions and is respectively in contact with the first region and the N-type region, wherein

concentration of the acceptor element in the second regions is higher than in the first region, and

concentration of the acceptor element in the second regions is 1×10 19 cm −3 or more and 1×10 21 cm −3 or less.

2. The method for manufacturing the nitride semiconductor device according to claim 1 , wherein a maximum temperature of the heat treatment is 1300° C. or more and 2000° C. or less.

3. A nitride semiconductor device comprising:

a nitride semiconductor layer;

N-type regions formed on one surface side of the nitride semiconductor layer; and

a P-type region formed on the one surface side of the nitride semiconductor layer and sandwiched by the N-type regions on both sides,

wherein:

concentration of a donor element in the N-type regions has a value equal to or greater than concentration of an acceptor element in the P-type region, and

concentration of the acceptor element in at least a portion of the P-type region is 1×10 19 cm −3 or more and 1×10 21 cm −3 or less,

the N-type regions have a portion with low concentration of the donor element adjacent to the P-type region, and

the P-type region includes:

a first region; and

second regions each of which is located between the first region and one of the N-type regions and is respectively in contact with the first region and the N-type region, wherein

concentration of the acceptor element in the second regions is higher than in the first region, and

concentration of the acceptor element in the second regions is 1×10 19 cm −3 or more and 1×10 21 cm −3 or less.

4. The nitride semiconductor device according to claim 3 , wherein an interval between portions within the N-type regions, the portions sandwiching the P-type region on both sides, is 50 nm or more and 500 nm or less.

5. The nitride semiconductor device according to claim 3 , wherein depth of the N-type regions from the one surface and depth of the P-type region from the one surface are same depth as each other.

6. The nitride semiconductor device according to claim 3 , wherein the nitride semiconductor layer is gallium nitride.

7. The nitride semiconductor device according to claim 3 , wherein the acceptor elements include at least either magnesium or beryllium.

8. The nitride semiconductor device according to claim 3 , wherein density of acceptor segregation in the second regions is lower than density of the acceptor segregation in the first region.

9. The nitride semiconductor device according to claim 8 , wherein

when the acceptor segregation is classified into:

rod-like acceptor segregation having a length in one direction of 30 nm or more and a concentration of the acceptor element of 5×10 20 cm −3 or more; and

non-rod-like acceptor segregation having a length in one direction of less than 30 nm and a concentration of the acceptor element of 5×10 20 cm −3 or more,

in the second regions, density of the rod-like acceptor segregation is equal to or less than 1×10 14 cm −3 , and density of the non-rod-like acceptor segregation is less than 1×10 15 cm −3 .

10. The nitride semiconductor device according to claim 3 , wherein length of each of the second regions in a direction in which the N-type regions sandwich the P-type region on both sides is 1 nm or more and 25 nm or less.

11. The nitride semiconductor device according to claim 3 further comprising an electrode formed on the P-type region.

12. The nitride semiconductor device according to claim 3 comprising:

a P-type well region formed in the nitride semiconductor layer; and

a field effect transistor formed in the nitride semiconductor layer and having a channel formed in the well region,

wherein the P-type region has a higher concentration of the acceptor element than the well region and is in contact with the well region.

13. The nitride semiconductor device according to claim 3 comprising

a diode formed in the nitride semiconductor layer,

wherein the P-type region is included in an anode region of the diode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2022
From: TANAKA, RYO; OHUCHI, YUKI; UENO, KATSUNORI; TAKASHIMA, SHINYA
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 058829/0666 →
Priority Claims (1)
JP 2021-36613 · Mar 8, 2021 · national
Continuity (1)
Related Publication 20220285503A1 · Sep 8, 2022
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