Integrated circuit devices and methods of manufacturing the same
An integrated circuit (IC) device includes a lower electrode including a first metal, a dielectric film on the lower electrode, and a conductive interface layer between the lower electrode and the dielectric film. The conductive interface layer includes a metal oxide film including at least one metal element. An upper electrode including a second metal is opposite the lower electrode, with the conductive interface layer and the dielectric film therebetween. To manufacture an IC device, an electrode including a metal is formed adjacent to an insulating pattern on a substrate. A conductive interface layer including a metal oxide film including at least one metal element is selectively formed on a surface of the electrode. A dielectric film is formed to be in contact with the conductive interface layer and the insulating pattern.
1. An integrated circuit device comprising:
a lower electrode on a substrate, the lower electrode comprising a first metal;
an insulating pattern adjacent to the lower electrode
a dielectric film on a sidewall of the lower electrode, the dielectric film comprising a lower surface in contact with the insulating pattern;
a conductive interface layer between the sidewall of the lower electrode and the dielectric film, the conductive interface layer comprising a metal oxide film including at least one metal element; and
an upper electrode opposite the lower electrode, with the conductive interface layer and the dielectric film therebetween,
wherein a sidewall of the dielectric film that faces the lower electrode is spaced apart from the lower electrode with the conductive interface layer therebetween, and
wherein the conductive interface layer is not between the insulating pattern and the dielectric film.
2. The integrated circuit device of claim 1 ,
wherein the conductive interface layer comprises a first interface sub-layer and a second interface sub-layer,
wherein the first interface sub-layer is between the second interface sub-layer and the lower electrode, and
wherein the first interface sub-layer and the second interface sub-layer comprise respective metal oxide films comprising different metal elements, respectively.
3. The integrated circuit device of claim 1 , wherein the at least one metal element included in the conductive interface layer comprises an alkali metal, an alkaline earth metal, a transition metal, or a post-transition metal.
4. The integrated circuit device of claim 1 , wherein a thickness of the conductive interface layer is less than a thickness of the dielectric film.
5. The integrated circuit device of claim 1 ,
wherein the conductive interface layer comprises a first interface sub-layer, a second interface sub-layer, and a third interface sub-layer,
wherein the first interface sub-layer is between the second interface sub-layer and the lower electrode,
wherein the second interface sub-layer is between the first interface sub-layer and the third interface sub-layer, and
wherein the first interface sub-layer, the second interface sub-layer, and the third interface sub-layer comprise respective metal oxide films comprising different metal elements, respectively.
6. The integrated circuit device of claim 1 ,
wherein the conductive interface layer comprises a first interface sub-layer, a second interface sub-layer, and a third interface sub-layer,
wherein the first interface sub-layer is between the second interface sub-layer and the lower electrode,
wherein the second interface sub-layer is between the first interface sub-layer and the third interface sub-layer,
wherein each of the first interface sub-layer and the third interface sub-layer comprises a first metal element, and
wherein the second interface sub-layer comprises a second metal element that is different from the first metal element.
7. The integrated circuit device of claim 1 , wherein the metal oxide film comprises a single film comprising at least two different metal elements.
8. The integrated circuit device of claim 1 , wherein the conductive interface layer has a structure in which a first interface sub-layer and a second interface sub-layer are alternately stacked one by one, wherein the first interface sub-layer comprises a first metal oxide film comprising a first metal element, the second interface sub-layer comprises a second metal oxide film comprising a second metal element, and the second metal element is different from the first metal element.
9. The integrated circuit device of claim 1 ,
wherein an uppermost surface of the lower electrode extends in a lateral direction without a step,
wherein the conductive interface layer comprises an interface top portion and an interface side portion, wherein the interface top portion is in contact with the uppermost surface of the lower electrode and extends in the lateral direction without a step, and the interface side portion is integrally connected to the interface top portion and in contact with the sidewall of the lower electrode, and
wherein a width of the interface top portion is greater than a width of the uppermost surface of the lower electrode in the lateral direction.
10. An integrated circuit device comprising:
a substrate comprising an active region;
a conductive region on the active region;
a capacitor on the conductive region; and
an insulating support pattern configured to support a portion of the capacitor,
wherein the capacitor comprises:
a lower electrode comprising a first metal, the lower electrode comprising a sidewall having a first portion in contact with the insulating support pattern and a second portion not in contact with the insulating support pattern;
a dielectric film on the lower electrode and the insulating support pattern;
an interface layer between the lower electrode and the dielectric film, the interface layer comprising a metal oxide film including at least one metal element; and
an upper electrode opposite the lower electrode, with the interface layer and the dielectric film therebetween, the upper electrode comprising a second metal,
wherein the interface layer comprises at least three interface sub-layers that are on the lower electrode, and
wherein two adjacent ones of the at least three interface sub-layers comprise different metal elements, respectively.
11. The integrated circuit device of claim 10 ,
wherein the interface layer comprises a plurality of interface sub-layers that are on the lower electrode,
wherein the plurality of interface sub-layers comprise a first interface sub-layer and a second interface sub-layer that are in contact with each other,
wherein the first interface sub-layer is between the second interface sub-layer and the lower electrode, and
wherein the first interface sub-layer and the second interface sub-layer comprise different metal elements, respectively.
12. The integrated circuit device of claim 10 , wherein the insulating support pattern comprises a silicon nitride (SiN) film, a silicon carbon nitride (SiCN) film, a silicon boron nitride (SiBN) film, or a combination thereof.
13. The integrated circuit device of claim 10 , wherein the interface layer comprises aluminum (Al), zirconium (Zr), niobium (Nb), molybdenum (Mo), ruthenium (Ru), indium (In), tin (Sn), antimony (Sb), scandium (Sc), titanium (Ti), vanadium (V), manganese (Mn), iron (Fe), cobalt (Co), nickel (Ni), arsenic (As), tantalum (Ta), tungsten (W), iridium (Ir), yttrium (Y), bismuth (Bi), or a combination thereof.
14. The integrated circuit device of claim 10 ,
wherein a first vertical distance from the substrate to an uppermost surface of the interface layer is greater than a second vertical distance from the substrate to an uppermost surface of the insulating support pattern,
wherein the second portion of the sidewall of the lower electrode is larger than the first portion of the sidewall of the lower electrode, and
wherein a lower surface of the lower electrode is in contact with an upper surface of the conductive region.
15. The integrated circuit device of claim 10 ,
wherein an uppermost surface of the lower electrode extends in a lateral direction without a step,
wherein the interface layer comprises an interface top portion and an interface side portion, wherein the interface top portion is in contact with the uppermost surface of the lower electrode and extends in the lateral direction without a step, and the interface side portion is integrally connected to the interface top portion and in contact with the second portion of the sidewall of the lower electrode, and
wherein a width of the interface top portion is greater than a width of the uppermost surface of the lower electrode in the lateral direction.
16. An integrated circuit device comprising:
a substrate comprising an active region;
a plurality of conductive regions on the active region;
an insulating pattern extending in a lateral direction on the plurality of conductive regions, the insulating pattern having a plurality of openings vertically overlapping the plurality of conductive regions;
a plurality of lower electrodes passing through the insulating pattern via the plurality of openings, the plurality of lower electrodes being connected to the plurality of conductive regions and each comprising a first metal;
an insulating support pattern extending in the lateral direction at a position spaced apart from the insulating pattern in a vertical direction, the insulating support pattern in contact with a portion of each of the plurality of lower electrodes to support the plurality of lower electrodes;
a dielectric film on the plurality of lower electrodes, the insulating pattern, and the insulating support pattern;
a conductive interface layer between the plurality of lower electrodes and the dielectric film, the conductive interface layer comprising a metal oxide film including at least one metal element; and
an upper electrode opposite the plurality of lower electrodes, with the conductive interface layer and the dielectric film therebetween, the upper electrode comprising a second metal.
17. The integrated circuit device of claim 16 ,
wherein the conductive interface layer comprises a plurality of interface sub-layers that are on a surface of each of the plurality of lower electrodes, and
wherein the plurality of interface sub-layers comprise a first interface sub-layer and a second interface sub-layer that are in contact with each other,
wherein the first interface sub-layer is between the second interface sub-layer and the surface, and
wherein the first interface sub-layer and the second interface sub-layer comprise different metal elements, respectively.
18. The integrated circuit device of claim 16 , wherein the conductive interface layer comprises two or more of aluminum oxide, zirconium oxide, niobium oxide, molybdenum oxide, ruthenium oxide, indium oxide, tin oxide, antimony oxide, scandium oxide, titanium oxide, vanadium oxide, manganese oxide, iron oxide, cobalt oxide, nickel oxide, arsenic oxide, tantalum oxide, tungsten oxide, iridium oxide, yttrium oxide, or bismuth oxide.