Confined phase-change memory cell with self-aligned electrode and reduced thermal loss
A confined phase-change memory cell with self-aligned electrode includes a first conductive structure within a first dielectric layer. A phase-change memory pillar including a first portion of a phase-change material is confined within a second dielectric layer and electrically connected to the first conductive structure. A second conductive structure within a third dielectric layer is surrounded by a second portion of the phase-change material for electrically connecting the second conductive structure to the phase-change memory pillar and reducing heat loss.
1 . A memory device, comprising:
a first conductive structure within a first dielectric layer;
a phase-change memory pillar including a first portion of a phase-change material confined within a second dielectric layer, the phase-change memory pillar being electrically connected to the first conductive structure;
a second conductive structure within a third dielectric layer, wherein a second portion of the phase-change material surrounds the second conductive structure and electrically connects the second conductive structure to the phase-change memory pillar; and
a phase-change material shell surrounding the second conductive structure and formed around the first conductive structure to cover a top surface and opposite sidewalls of the first conductive structure, wherein a thickness of the phase-change material is less than half a distance between opposite sidewalls of the third dielectric layer and greater than half a distance between opposite sidewalls of the second dielectric layer.
2 . The memory device of claim 1 , wherein the first conductive structure comprises a bottom electrode and the second conductive structure comprises a top electrode.
3 . The memory device of claim 1 , wherein the phase-change material is selected from the group consisting of: Ge—Sb—Te alloys, Si—Sb—Te alloys, Ga—Sb—Te alloys, Ge—Bi—Te alloys, In—Se alloys, As—Sb—Te alloys, Ag—In—Sb—Te alloys, Ge—In—Sb—Te alloys, Ge—Sb alloys, Sb—Te alloys, and Si—Sb alloys.
4 . The memory device of claim 1 , wherein the second portion of the phase-change material substantially covers a bottom surface and opposite sidewalls of the second conductive structure.
5 . The memory device of claim 1 , wherein the phase-change material shell surrounds the first conductive structure, the phase-change material shell comprising the phase-change material.
6 . The memory device of claim 1 , wherein a thermal conductivity of the phase-change material shell is less than a thermal conductivity of the second dielectric layer and less than a thermal conductivity of the third dielectric layer for reducing heat loss.
7 . The memory device of claim 1 , wherein the second dielectric layer is made of silicon nitride and the third dielectric layer is made of silicon dioxide.
8 . The memory device of claim 1 , further comprising a device level located below the first conductive structure.
9 . The memory device of claim 1 , wherein the second dielectric layer is made of silicon nitride and the third dielectric layer is made of silicon dioxide.
10 . A memory device, comprising:
a first dielectric layer;
a second dielectric layer deposited above the first dielectric layer;
a third dielectric layer deposited above the second dielectric layer;
a phase change memory comprising a phase-change material that has at least a phase-change material shell above a phase-change memory pillar, wherein a thickness of the phase-change material is less than half a distance between opposite sidewalls of the third dielectric layer and greater than half a distance between opposite sidewalls of the second dielectric layer; and
a top electrode surrounded by the phase-change material shell, wherein respective top surfaces of the phase-change material shell and the top electrode are substantially coplanar.
11 . The memory device of claim 10 , wherein the top electrode and the phase-change memory pillar are substantially aligned.
12 . The memory device of claim 10 , wherein the phase-change material shell is in direct contact with at least a bottom surface of the top electrode and respective side surfaces of the top electrode.
13 . The memory device of claim 10 , further comprising a bottom electrode in direct contact with at least a bottom surface of the phase-change memory pillar.
14 . The memory device of claim 13 , wherein the bottom electrode is within the first dielectric layer.
15 . The memory device of claim 10 , wherein the phase-change memory pillar is within the second dielectric layer deposited upon the first dielectric layer.
16 . The memory device of claim 10 , wherein the phase-change material shell is within the third dielectric layer deposited upon the second dielectric layer.
17 . The memory device of claim 10 , wherein the phase-change material shell comprises respective vertical portions that are above and extend from a horizontal portion.
18 . The memory device of claim 17 , wherein the top electrode is in direct contact with associated inner side surfaces of the respective vertical portions and is in direct contact with an associated top surface of the horizontal portion.
19 . A memory device, comprising:
a first dielectric layer;
a second dielectric layer deposited above the first dielectric layer;
a third dielectric layer deposited above the second dielectric layer;
a phase-change material comprising a central pillar portion, an upper shell portion associated with a top of the central pillar portion, and a lower shell portion associated with a bottom of the central pillar portion, wherein a thickness of the phase-change material is less than half a distance between opposite sidewalls of the third dielectric layer and greater than half a distance between opposite sidewalls of the second dielectric layer;
a top electrode surrounded by the upper shell portion, wherein respective top surfaces of the upper shell portion and the top electrode are substantially coplanar; and
a bottom electrode surrounded by the lower shell portion, wherein respective bottom surfaces of the lower shell portion and the bottom electrode are substantially coplanar.