IP Library Granted Patent US 11,893,281
Granted Patent B2
US 11,893,281 · App. 17/652,815 · Granted Feb 6, 2024

Execution condition embedded in a command or a request to storage device

Inventors: Tomer Spector (Kibbutz Ginegar, IL); Doron Ganon (Kfar Vradim, IL); Eran Arad (Misgav, IL)
Assignee: Western Digital Technologies, Inc.
G06F3/0659G06F3/0658G06F3/0679G06F13/1642
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Quick Facts
Patent No.
US 11,893,281
App. No.
17/652,815
Granted
Feb 6, 2024
Kind
B2
Abstract

A storage device includes a non-volatile memory (NVM) and a storage device controller. The storage device controller includes a NVM interface coupled to the NVM and one or more task queues. The storage device controller is operable to pick a task from one or more queues of the storage device. The task is parsed based upon presence of an extra header segment with an execution condition. The task without the extra header segment is sent to execution. Whether the execution condition of the extra header segment of the task is met is determined. The task with the execution condition met is sent to execution. The task with the execution condition unmet is postponed.

Claims (38)

1. A storage device, comprising:

a non-volatile memory (NVM); and

a storage device controller, comprising:

a NVM interface coupled to the NVM, and

a universal flash storage interconnect;

the storage device controller configured to:

receive a first write-verify thread as a first simple write command Universal Flash Storage protocol information unit (UPIU) and as a first simple read command UPIU with a first extra header segment with a first execution condition whether a first write command of the first simple write command UPIU has completed;

receive a second write-verify thread as a second simple write command UPIU and as a second simple read command UPIU with a second extra header segment with a second execution condition whether a second write command of the second simple write command UPIU is completed; and

execute the first write-verify thread and the second write-verify thread in parallel.

2. The storage device of claim 1 , wherein the first simple read command UPIU and the second read command UPIU do not block other tasks from execution by the storage device.

3. The storage device of claim 1 , wherein one or more tasks is performed between a first simple write task of the first simple write command UPIU and a first simple read task of the first simple read command UPIU.

4. The storage device of claim 1 , wherein the first extra header segment of the first simple read command UPIU and the second extra header segment of the second simple read command UPIU each further contains an extra header type code indicating an execution condition specifier.

5. The storage device of claim 1 , wherein the first extra header segment of the first simple read command UPIU further contains a pointer to any next extra header segment.

6. The storage device of claim 1 , wherein the storage device controller is configured to send a first write response UPIU to a host indicating successful completion of the first simple write command.

7. The storage device of claim 6 , wherein the storage device controller is configured to send a first read response UPIU to the host indicating successful completion of the first simple read command.

8. The storage device of claim 1 , wherein the storage device controller is further configured to receive a query request UPIU with a purge enable flag.

9. The storage device of claim 8 , wherein the storage device controller is further configured to send a query response UPIU to a host indicating a current status of enabling the purge flag.

10. The storage device of claim 9 , wherein the storage device controller is further configured to send a query response UPIU to the host indicating successful completion of enabling the purge flag.

11. A storage device, comprising:

a non-volatile memory (NVM); and

a storage device controller, comprising:

a NVM interface coupled to the NVM,

a plurality of task queues, and

a universal flash storage interconnect;

the storage device controller configured to:

receive a query request UPIU containing a set flag of purge enable and containing a first extra header segment with an execution condition of whether the task queues of the storage device are empty;

receive a command/request UPIU following receiving the query request UPIU, the command/request UPIU containing a second extra header segment with an execution condition whether a purge task enabled by the query request UPIU has completed;

execute the purge task pursuant to the set flag of purge enable after the task queues of the storage device are empty; and

execute a task of the command/request UPIU after completion of the purge task.

12. The storage device of claim 11 , wherein the query request UPIU is received when the task queues contains one or more tasks.

13. The storage device of claim 11 , wherein the command/request UPIU is received during execution of the purge task.

14. The storage device of claim 11 , wherein the command/request UPIU is received without receiving any status request of the purge task from a host.

15. The storage device of claim 11 , wherein the first extra header segment of the query request UPIU further contains a pointer to any next extra header segment.

16. The storage device of claim 11 , wherein the storage device controller is configured to select a task from plurality of task queues.

17. The storage device of claim 16 , wherein the storage device controller is configured to parse the selected task to determine whether there is an execution condition.

18. The storage device of claim 17 , wherein the storage device controller is configured to parse the task to determine whether the execution condition has been met.

19. The storage device of claim 18 , wherein the storage device controller is configured to execute the task upon determining that the execution condition has been met.

20. The storage device of claim 18 , wherein the storage device controller is configured to place the task in a task queue upon determining that the execution condition has not been met.

Assignments (8)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2022
From: SPECTOR, TOMER; GANON, DORON; ARAD, ERAN
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059121/0222 →
Continuity (2)
Division 16438381 · Jun 11, 2019
Related Publication 20220179587A1 · Jun 9, 2022