IP Library Granted Patent US 12,387,020
Granted Patent B2
US 12,387,020 · App. 17/659,809 · Granted Aug 12, 2025

Die location based logical block formation and handling

Inventors: Ramanathan Muthiah (Karnataka, IN); Ankur Agrawal (Uttar Pradesh, IN); Muralitharan Jayaraman (Karnataka, IN)
Assignee: SANDISK TECHNOLOGIES, INC.
G06F30/327G06F12/0246G06F30/392
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Quick Facts
Patent No.
US 12,387,020
App. No.
17/659,809
Granted
Aug 12, 2025
Kind
B2
Abstract

Aspects of a storage device are provided for efficient handling of logical metablock formation based on a heat distribution within the storage device. The storage device includes a plurality of memory dies each including a physical block, and a controller which forms a logical metablock from the physical blocks based on a location of each of the memory dies with respect to the controller. The controller stores a mapping of heat credit points to each of the physical blocks, where each of the heat credit points are associated with a respective heat level. The controller forms logical metablocks from the physical blocks based on the mapping. For instance, the controller forms different logical metablocks from physical blocks based on respective heat levels associated with memory dies including those blocks. As a result, efficient logical block formation may be achieved without significant complexity in firmware implementation.

Claims (35)

1. A storage device, comprising:

a plurality of memory dies each including a physical block; and

a controller configured to generate a mapping of heat levels to the physical blocks and to form a logical metablock from the physical blocks based on the mapping, the mapping being generated during storage device fabrication based on a location of each of the physical blocks with respect to the controller.

2. The storage device of claim 1 , wherein the controller is further configured to obtain heat credit points associated with each of the physical blocks, and to form the logical metablock based on the heat credit points.

3. The storage device of claim 1 , wherein one of the memory dies includes a plurality of physical blocks, and the controller is further configured to obtain heat credit points associated with each of the physical blocks of the one of the memory dies, to consolidate the heat credit points, and to form the logical metablock based on the consolidation.

4. The storage device of claim 3 , wherein the controller is further configured to select multiple ones of the memory dies for forming the logical metablock based on the consolidation.

5. The storage device of claim 1 ,

wherein the controller is further configured to form the logical metablock based on first heat credit points associated with one of the memory dies, and to form a second logical metablock based on second heat credit points associated with each of a plurality of other memory dies,

wherein the first heat credit points and the second heat credit points indicate different heat levels.

6. The storage device of claim 5 , wherein the logical metablock and the second logical metablock are each associated with a different quality of service (QOS).

7. The storage device of claim 5 , wherein the controller is further configured to store source data for data computations in the logical metablock in response to the first heat credit points indicating a lower heat level than the second heat credit points.

8. A storage device, comprising:

a plurality of memory dies each including a plurality of physical blocks; and

a controller configured to obtain a mapping of heat levels to the physical blocks during storage device fabrication based on a proximity of each of the physical blocks to the controller, to form a first logical metablock from multiple ones of the physical blocks based on the mapping of a first heat level associated with one of the memory dies, and to form a second logical metablock from other multiple ones of the physical blocks based on the mapping of a second heat level associated with another one of the memory dies, wherein the first heat level is different than the second heat level.

9. The storage device of claim 8 , wherein the controller is further configured to apply different cell voltage distribution (CVD) parameters for the first logical metablock and the second logical metablock in response to the first heat level being different than the second heat level.

10. The storage device of claim 8 ,

wherein the controller is further configured to relocate first data in the first logical metablock from a first source block to a first destination block during a first garbage collection, and to relocate second data in the second logical metablock from a second source block to a second destination block during a second garbage collection,

wherein the first source block and the first destination block are associated with the first heat level, and the second source block and the second destination block are associated with the second heat level.

11. The storage device of claim 8 , wherein the controller is further configured to relocate data in the first logical metablock from a source block to a destination block during garbage collection, and the source block and the destination block are associated with different heat levels.

12. The storage device of claim 8 ,

wherein the controller is further configured to consolidate heat credit points associated with each of the physical blocks in the one of the memory dies during a download and execute (DLE) time of the storage device, and to form the logical metablock based on the consolidation.

13. The storage device of claim 12 , wherein the controller is further configured to obtain a mapping of the heat credit points to each of the multiple physical blocks during the DLE time.

14. A storage device, comprising:

a plurality of memory dies each including a plurality of physical blocks; and

a controller configured to obtain and store a mapping of heat credit points to each of the physical blocks during storage device fabrication based on a location of the each of the physical blocks with respect to the controller, and to form a logical metablock from multiple ones of the physical blocks based on the mapping.

15. The storage device of claim 14 , wherein the controller is further configured to modify the mapping during a runtime of the storage device.

16. The storage device of claim 14 ,

wherein the controller is further configured to form the logical metablock from the multiple ones of the physical blocks based on first heat points associated with one of the memory dies, and to form a second logical metablock from other multiple ones of the physical blocks based on second heat points associated with another one of the memory dies,

wherein the first heat points is lesser than the second heat points.

17. The storage device of claim 14 ,

wherein the controller is further configured to store data in one of the physical blocks associated with lesser heat points in response to a greater temperature of the storage device;

wherein the controller is further configured to store the data in a different one of the physical blocks associated with greater heat points in response to a lesser temperature of the storage device.

18. The storage device of claim 14 , wherein the logical metablock is one of N types of logical metablocks each associated with a different heat level, and the memory dies including the multiple ones of the physical blocks from which the logical metablock is formed are each associated with a same heat level, wherein N>1.

19. The storage device of claim 18 , wherein the controller is further configured to apply different cell voltage distribution (CVD) parameters for the N types of the logical metablocks.

20. The storage device of claim 18 , wherein the controller is further configured to relocate data in the logical metablock during garbage collection from a source block associated with a heat level to a destination block associated with a same heat level, the heat level being different for each of the N types of the logical metablocks.

Assignments (8)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 21, 2022
From: MUTHIAH, RAMANATHAN; AGRAWAL, ANKUR; JAYARAMAN, MURALITHARAN
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 060582/0978 →