Resource management for solid state drive accelerators
Solid State Drive devices with hardware accelerators and methods for apportioning storage resources with tokens in the SSD are disclosed. SSDs typically comprise an array of non-volatile memory devices and a controller which manages access to the memory devices. The controller may also comprise one or more accelerators to either improve the performance of the SSD itself or to offload specialized computation workloads of a host-computing device. Different accelerators may be dynamically assigned portions of the non-volatile memory array according to the type of data being accessed and/or the throughput required. Provision is also made for the data to be accessed directly by the accelerators bypassing the controller. The accelerators may also share data bus bandwidth and resources with each other or the storage device controller. To minimize conflicts and improve the storage device performance, a system of tokens for both cache memory and bus bandwidth is used to dynamically assign these resources.
1. A device, comprising:
a processor;
a memory, wherein:
the memory is non-volatile memory,
the memory comprises a plurality of non-volatile memory devices, and
the non-volatile memory devices each comprise a plurality of memory blocks;
a memory bus which has a bandwidth;
an accelerator which accesses the memory via the memory bus directly, bypassing the processor;
a token manager logic for managing the memory and the memory bus; and
wherein:
the accelerator has a throughput, the throughput having a first memory requirement and a second memory requirement, the second memory requirement being greater than the first memory requirement, wherein:
the token manager logic assigns a persistent memory token to the accelerator for generating a portion of the memory assigned as a data structure to the accelerator according to the accelerator first memory requirement, and
the token manager logic assigns a transitory memory token to the accelerator according to the second memory requirement.
2. The device of claim 1 , wherein the transitory memory token is activated to assign an additional portion of the memory to the accelerator.
3. The device of claim 2 , wherein the one transitory memory token of the one or more transitory memory tokens is deactivated to deassign the additional portion of the memory from the accelerator.
4. The device of claim 3 , wherein the transitory memory token is a priority memory token.
5. The device of claim 1 , wherein:
the data structure is interleaved,
the data structure comprises a portion of the plurality of memory blocks, and
the portion of the plurality of memory blocks is distributed over a plurality of the non-volatile memory devices.
6. The device of claim 1 , wherein:
the accelerator has a throughput, the throughput having a first bandwidth requirement and a second bandwidth requirement, the second bandwidth requirement being greater than the first bandwidth requirement, wherein:
the token manager logic assigns a persistent bandwidth token to the accelerator for generating a portion of the memory bus assigned to the accelerator according to the accelerator first bandwidth requirement, and
the token manager logic assigns a transitory bandwidth token to the accelerator according to the second bandwidth requirement.
7. The device of claim 6 , wherein the transitory bandwidth token is activated to assign an additional portion of the memory bus to the accelerator.
8. The device of claim 7 , wherein the transitory bandwidth token is deactivated to deassign the additional portion of the memory bus from the accelerator.
9. The device of claim 8 , wherein the transitory bandwidth token is a priority bandwidth token.
10. The device of claim 1 , wherein:
the accelerator has a throughput, the throughput having a first bandwidth requirement and a second bandwidth requirement, the second bandwidth requirement being greater than the first bandwidth requirement, wherein:
the token manager logic assigns a persistent bandwidth token to the accelerator generating a portion of the memory bus assigned to the accelerator according to the accelerator first bandwidth requirement, and
the token manager logic assigns a transitory bandwidth token to the accelerator according to the second bandwidth requirement.
11. A method of operating a system, the system comprising: a host-computing device and a storage device, the storage device comprising: a processor, a non-volatile memory, a memory bus, an accelerator, wherein the accelerator accesses the non-volatile memory array bypassing the processor, and a token manager logic, the method comprising:
storing data in the non-volatile memory;
requesting a calculation on the data in the non-volatile memory by the host-computing device;
determining a first memory requirement and a second memory requirement of the accelerator for the requested calculation, the second memory requirement being greater than the first memory requirement;
provisioning the accelerator with a persistent memory token in the token manager logic according to the first memory requirement;
provisioning the accelerator with a transitory memory token in the token manager logic according to the second memory requirement;
activating the persistent memory token;
assigning a first portion of the non-volatile memory to the accelerator according to the activated persistent memory token; and
activating the transitory memory token for a first predefined period of time; and
assigning a second portion of the non-volatile memory to the accelerator according to the activated transient memory token.
12. The method of claim 11 , the method further comprising:
calculating the result of the requested calculation; and
returning the result of the requested calculation to the host-computing system.
13. The method of claim 11 , the method further comprising:
determining a first bandwidth requirement and a second bandwidth requirement of the accelerator for the requested calculation, the second bandwidth requirement being greater than the first bandwidth requirement;
provisioning the accelerator with a persistent bandwidth token in the token manager logic according to the first bandwidth requirement;
provisioning the accelerator with transitory bandwidth token in the token manager logic according to the second bandwidth requirement;
activating the persistent bandwidth token;
assigning a first portion of the memory bus to the accelerator according to the activated persistent bandwidth token;
activating a transitory bandwidth token for a second predefined period of time; and
assigning a second portion of the memory bus to the accelerator according to the activated transient bandwidth token.
14. The method of claim 13 , the method further comprising:
calculating the result of the requested calculation; and
returning the result of the requested calculation to the host-computing system.
15. The method of claim 14 , further comprising:
deactivating the transitory memory tokens after the first predefined period of time;
deassigning the second portion of the non-volatile memory;
deactivating the transitory bandwidth tokens after the second predefined period of time; and
deassigning the second portion of the memory bus.
16. A method of operating a device, the device comprising: a processor, a non-volatile memory, a memory bus, an accelerator, wherein the accelerator accesses the non-volatile memory array bypassing the processor, and a token manager logic, the method comprising:
storing data in the non-volatile memory;
requesting a calculation on the data in the non-volatile memory;
determining a first bandwidth requirement and a second bandwidth requirement of the accelerator, the second bandwidth requirement being greater than the first bandwidth requirement;
assigning a first portion of the memory bus to the accelerator according to the accelerator first bandwidth requirement;
provisioning a transitory bandwidth token to the accelerator according to the accelerator second bandwidth requirement; and
activating the transitory bandwidth token to assign a second portion of the memory bus to the accelerator.
17. The method of claim 16 , further comprising:
determining a first memory requirement and a second memory requirement of the accelerator, the second memory requirement being greater than the first memory requirement;
assigning a first portion of the non-volatile memory to the accelerator according to the accelerator first memory requirement;
provisioning a transitory memory token to the accelerator according to the accelerator second memory requirement;
activating of the transitory memory token to assign a second portion of the non-volatile memory to the accelerator;
calculating the result of the requested calculation;
deactivating the transitory bandwidth token;
deassigning the second portion of the memory bus;
deactivating the transitory memory token; and
deassigning the second portion of the non-volatile memory.
18. The method of claim 17 , wherein one of the activated transitory tokens is a priority token.