IP Library › Granted Patent US 12,426,305
Granted Patent B2
US 12,426,305 · App. 17/685,909 · Granted Sep 23, 2025

Semiconductor device including transistor having source/drain contract with convex curved surface

Inventors: Seung Hoon Choi (Yongin-si, KR); Ja Eung Koo (Yongin-si, KR); Il Young Yoon (Hwaseong-si, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
H10D30/6729H10D30/6757H10D62/121H10D64/01
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Quick Facts
Patent No.
US 12,426,305
App. No.
17/685,909
Granted
Sep 23, 2025
Kind
B2
Abstract

There is provided a semiconductor device capable of improving the performance and reliability of a device. The semiconductor device includes comprising a gate structure including a gate electrode and a gate capping pattern on an upper surface of the gate electrode; a source/drain pattern on at least one side of the gate structure; and a source/drain contact on and connected with an upper surface of the source/drain pattern, the source/drain contact extending along a sidewall of the gate electrode, wherein an upper surface of the source/drain contact includes a convex curved surface.

Claims (55)

1. A semiconductor device comprising:

a gate structure including a gate electrode and a gate capping pattern on an upper surface of the gate electrode in a first direction, and an upper surface of the gate capping pattern includes a concave curved surface;

a source/drain pattern on at least one side of the gate structure;

a source/drain contact on and connected with an upper surface of the source/drain pattern, the source/drain contact extending along a sidewall of the gate electrode; and

an etch stop layer disposed on the source/drain contact,

wherein an upper surface of the source/drain contact includes a convex curved surface, and

wherein the convex curved surface includes a linear portion in a cross-section of the convex curved surface defined by the first direction and a second direction perpendicular to the first direction, a first portion of the linear portion contacts an insulating layer disposed thereon and a second portion of the linear portion contacts a conducting layer disposed thereon,

the etch stop layer is continuously disposed on the convex curved surface of the upper surface of the source/drain contact and the concave curved surface of the gate capping pattern.

2. The semiconductor device of claim 1 , wherein a portion of the source/drain contact protrudes above an upper surface of the gate capping pattern.

3. The semiconductor device of claim 2 , wherein

the source/drain contact includes a source/drain filling layer and a source/drain barrier layer extended along a sidewall of the source/drain filling layer, and

the source/drain filling layer and the source/drain barrier layer protrude above the upper surface of the gate capping pattern.

4. The semiconductor device of claim 2 , wherein

the source/drain contact includes a source/drain filling layer and a source/drain barrier layer extended along a sidewall of the source/drain filling layer,

a portion of the source/drain filling layer protrudes above the upper surface of the gate capping layer, and

the source/drain barrier layer is below the upper surface of the gate capping pattern.

5. The semiconductor device of claim 1 , further comprising:

a gate contact passing through the gate capping pattern and connecting with the gate electrode,

wherein an upper surface of the gate contact includes a convex curved surface.

6. The semiconductor device of claim 1 , wherein

the source/drain contact includes a source/drain filling layer, and

an upper surface of the source/drain filling layer is included in the upper surface of the source/drain contact including the convex curved surface.

7. The semiconductor device of claim 6 , wherein the source/drain contact further includes a source/drain barrier layer extended along a sidewall of the source/drain filling layer.

8. The semiconductor device of claim 1 , wherein the upper surface of the source/drain contact includes a third portion having the convex curved surface and a fourth portion having a concave curved surface.

9. A semiconductor device comprising:

a gate structure including a gate electrode and a gate capping pattern on an upper surface of the gate electrode;

a source/drain pattern on at least one side of the gate structure; and

a source/drain contact on and connected with an upper surface of the source/drain pattern,

wherein at least a portion of the source/drain contact protrudes above an upper surface of the gate capping pattern directly above the gate structure, and uppermost portion of the upper surface of the gate capping pattern has a concave curved surface.

10. The semiconductor device of claim 9 , wherein an upper surface of the source/drain contact includes a convex curved surface.

11. The semiconductor device of claim 9 , wherein an upper surface of the source/drain contact includes a first portion having a convex curved surface and a second portion having a concave curved surface.

12. The semiconductor device of claim 9 , wherein

source/drain contact includes a source/drain filling layer and a source/drain barrier layer extending along a sidewall of the source/drain filling layer,

at least a portion of the source/drain filling layer and the source/drain barrier layer protrude above the upper surface of the gate capping pattern, and

at least a portion of the source/drain filling layer protrudes above an upper surface of the source/drain barrier layer.

13. The semiconductor device of claim 9 , further comprising:

a gate contact passing through the gate capping pattern and connecting with the gate electrode,

wherein an upper surface of the gate contact includes a convex curved surface.

14. The semiconductor device of claim 9 , wherein a central portion of the upper surface of the gate capping pattern includes the concave curved surface.

15. A semiconductor device comprising:

an active pattern including a lower pattern and a sheet pattern on the lower pattern, and an upper surface of the gate capping pattern includes a concave curved surface;

a gate structure on the active pattern, the gate structure including a gate electrode and a gate capping pattern, the gate electrode surrounding the sheet pattern, and the gate capping pattern on an upper surface of the gate electrode;

a source/drain pattern on at least one side of the gate structure;

a source/drain contact on and connected with an upper surface of the source/drain pattern;

a gate contact passing through the gate capping pattern and connecting with the gate electrode; and

an etch stop layer disposed on the source/drain contact,

wherein a portion of the source/drain contact and a portion of the gate contact protrude above an upper surface of the gate capping pattern directly above the gate electrode,

an uppermost surface of the source/drain contact includes a convex curved surface, and

the etch stop layer is continuously disposed on the convex curved surface of the upper surface of the source/drain contact and the concave curved surface of the gate capping pattern.

16. The semiconductor device of claim 15 , wherein

the source/drain contact includes a source/drain filling layer and a source/drain barrier layer extended along a sidewall of the source/drain filling layer, and

a portion of the source/drain filling layer and a portion of the source/drain barrier layer protrude above the upper surface of the gate capping pattern.

17. The semiconductor device of claim 15 , wherein

the gate contact includes a gate contact filling layer and a gate contact barrier layer extending along a sidewall of the gate contact filling layer, and

the gate contact filling layer and the gate contact barrier layer protrude above the upper surface of the gate capping pattern.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 7, 2022
From: CHOI, SEUNG HOON; KOO, JA EUNG; YOON, IL YOUNG
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 059185/0582 →
Priority Claims (1)
KR 10-2021-0108752 · Aug 18, 2021 · national
Continuity (1)
Related Publication 20230053379A1 · Feb 23, 2023
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