Storage system and method for improving read latency during mixed read/write operations
A storage system receives a request to read data that is located in a wordline undergoing a program operation. Instead of waiting for the program operation to complete, which would increase read latency, the storage system aborts the program operation and reconstructs the data from successfully-programmed memory cells in the wordline and from data latches associated with unsuccessfully-programmed memory cells in the wordline. The reconstructed data is then sent to the host. The program abort command can be similar to one used to provide a graceful shutdown in a power-loss situation.
1. A storage system comprising:
a memory comprising data latches and a plurality of wordlines; and
a processor configured to:
receive a read command from a host;
determine that execution of the read command requires reading a wordline that is undergoing an ongoing programming operation to program data from the data latches to the wordline;
send a command to the memory, wherein the memory is configured to abort the ongoing programming operation in response to receiving the command, wherein aborting the ongoing programming operation results in some, but not all, memory cells in the wordline being successfully programmed;
reconstruct the data that was to be programmed in the wordline from the data latches that correspond to memory cells in the wordline that were not successfully programmed and from the memory cells in the wordline that were successfully programmed; and
send the reconstructed data to the host in response to the read command;
wherein the memory is further configured to reconstruct the data one page at a time and the processor is further configured to stream the reconstructed data out of the wordline one page at a time into a host read buffer prior to sending the reconstructed data to the host.
2. The storage system of claim 1 , wherein the processor is further configured to determine whether a time to complete the ongoing programming operation exceeds a threshold amount of time.
3. The storage system of claim 2 , wherein the command is sent to the memory in response to the time to complete the ongoing programming operation exceeding the threshold amount of time.
4. The storage system of claim 1 , wherein the ongoing programming operation is aborted without corrupting the data latches.
5. The storage system of claim 1 , wherein the processor is further configured to send the reconstructed data to the host after determining that all pages of the wordline have been recovered.
6. The storage system of claim 1 , wherein the processor is further configured to determine that a memory cell in the wordline was successfully programmed in response to a program restart.
7. The storage system of claim 1 , wherein the memory comprises a single-level cell (SLC) memory and a multi-level cell (MLC) memory.
8. The storage system of claim 1 , wherein the memory comprises a three-dimensional memory.
9. In a storage system comprising a controller and a memory comprising data latches and a plurality of wordlines, a method comprising:
determining that execution of a read command received from a host requires reading a wordline that is undergoing an ongoing programming operation to program data from the data latches to the wordline; and
in response to determining that execution of the read command requires reading the wordline that is undergoing the ongoing programming operation, reducing read latency by:
faking a power loss situation by sending a graceful shutdown command from the controller to the memory even though the storage system is not undergoing power loss, wherein, in response to the graceful shutdown command, the memory aborts the ongoing programming operation, which results in some, but not all, memory cells in the wordline being successfully programmed;
reconstructing the data that was to be programmed in the wordline from the data latches that correspond to memory cells in the wordline that were not successfully programmed and from the memory cells in the wordline that were successfully programmed; and
sending the reconstructed data to the host.
10. The method of claim 9 , further comprising determining whether a time to complete the ongoing programming operation exceeds a threshold amount of time.
11. The method of claim 10 , wherein the graceful shutdown command is sent to the memory in response to the time to complete the ongoing programming operation exceeding the threshold amount of time.
12. The method of claim 9 , wherein the ongoing programming operation is aborted without corrupting the data latches.
13. The method of claim 9 , further comprising reconstructing the data one page at a time and streaming the reconstructed data out of the wordline one page at a time into a host read buffer prior to sending the reconstructed data to the host.
14. The method of claim 9 , further comprising sending the reconstructed data to the host after determining that all pages of the wordline have been recovered.
15. The method of claim 9 , further comprising determining that a memory cell in the wordline was successfully programmed in response to a program restart.
16. The method of claim 9 , further comprising logging memory status information and information about write-aborted locations.
17. The method of claim 9 , wherein the memory comprises a single-level cell (SLC) memory and a multi-level cell (MLC) memory.
18. The method of claim 9 , wherein the memory comprises a three-dimensional memory.
19. A storage system comprising:
a memory comprising data latches and a plurality of wordlines; and
means for:
determining that execution of a read command received from a host requires reading a wordline that is undergoing an ongoing programming operation to program data from the data latches to the wordline; and
in response to determining that execution of the read command requires reading the wordline that is undergoing the ongoing programming operation, reducing read latency by:
faking a power loss situation by sending a graceful shutdown command to the memory even though the storage system is not undergoing power loss, wherein, in response to the graceful shutdown command, the memory aborts the ongoing programming operation, which results in some, but not all, memory cells in the wordline being successfully programmed;
sending a command to the memory, wherein, in response to the command, the memory aborts the ongoing programming operation, which results in some, but not all, memory cells in the wordline being successfully programmed;
reconstructing the data that was to be programmed in the wordline from the data latches that correspond to memory cells in the wordline that were not successfully programmed and from the memory cells in the wordline that were successfully programmed; and
sending the reconstructed data to the host.