3D device with a plurality of core wiring layout architecture
Systems and methods for manufacturing semiconductor devices. The system can include a semiconductor device. The semiconductor device can include a semiconductor shell that extends along a vertical direction. The semiconductor device can include a first metal structure surrounded by a lower portion of the semiconductor shell. The semiconductor device can include a dielectric structure above the first metal structure. The semiconductor device can include a second metal structure through the dielectric structure.
1. A method for manufacturing semiconductor devices, the method comprising:
forming a semiconductor shell that is separated from a substrate and extends along a vertical direction;
forming a first metal structure surrounded by a lower end portion of the semiconductor shell;
forming a dielectric structure above the first metal structure surrounded by the semiconductor shell;
forming a metal gate around an inner sidewall of the semiconductor shell; and
forming a second metal structure extending along the vertical direction, wherein the second metal structure is in electrical connect with the first metal structure and is separated from the metal gate.
2. The method of claim 1 , wherein forming the semiconductor shell further comprises forming a first source/drain structure and a second source/drain structure, the method further comprising:
forming a third metal structure extending along the vertical direction and in electrical contact with a second metal gate around an outer sidewall of the semiconductor shell; and
forming a fourth metal structure extending along the vertical direction and in electrical contact with the first source/drain structure or the second source/drain structure.
3. The method of claim 1 , wherein forming the semiconductor shell further comprises forming a first source/drain structure and a second source/drain structure and wherein the metal gate further includes a portion extending along the vertical direction beyond a top of the semiconductor shell, the method further comprising:
forming a third metal structure in electrical contact with the metal gate; and
forming a fourth metal structure extending along the vertical direction and in electrical contact with the first source/drain structure or the second source/drain structure.
4. The method of claim 3 , further comprising:
forming a second semiconductor shell that extends along the vertical direction, wherein the second semiconductor shell comprises a third source/drain structure and a fourth source/drain structure, wherein the metal gate further includes a portion extending along the vertical direction beyond a top of the second semiconductor shell;
forming a fifth metal structure surrounded by a lower portion of the second semiconductor shell;
forming a second dielectric structure above the fifth metal structure;
forming a sixth metal structure in electrical contact with the metal gate; and
forming a seventh metal structure in electrical contact with the third source/drain structure and the fourth source/drain structure.
5. The method of claim 4 , further comprising:
forming a power rail in electrical contact with the fifth metal structure;
wherein the power rail is disposed below the fifth metal structure.
6. The method of claim 1 , wherein forming the semiconductor shell further comprises forming an outer shell surrounded by a second metal gate, and comprises forming a first source/drain structure and a second source/drain structure, the method further comprising:
forming a third metal structure through the dielectric structure to be in electrical contact with the metal gate;
forming a fourth metal structure in electrical contact with the second metal gate; and
forming a fifth metal structure in electrical contact with the first source/drain structure or the second source/drain structure.
7. The method of claim 1 , wherein forming the semiconductor shell further comprises forming an outer shell surrounded by a second metal gate, and comprises forming a first source/drain structure and a second source/drain structure, the method further comprising:
forming the metal gate that includes a portion extending along the vertical direction beyond a top of the semiconductor shell, and is surrounded by the dielectric structure;
forming a third metal structure in electrical contact with the second metal gate;
forming a fourth metal structure in electrical contact with the metal gate; and
forming a fifth metal structure in electrical contact with the first source/drain structure or the second source/drain structure.
8. The method of claim 7 , further comprising:
forming a power rail in electrical contact with the first metal structure;
wherein the power rail is disposed below the first metal structure.
9. The method of claim 1 , wherein forming the semiconductor shell further comprises forming an outer shell surrounded by a second metal gate, and comprises forming a first source/drain structure and a second source/drain structure, the method further comprising:
forming the metal gate that includes a portion extending along the vertical direction beyond a top of the semiconductor shell and is surrounded by the dielectric structure;
removing at least a portion of the metal gate, thereby forming an opening surrounded by the semiconductor shell;
lining the opening with a third metal gate;
forming a third metal structure in electrical contact with the second metal gate;
forming a fourth metal structure in electrical contact with the third metal gate; and
forming a fifth metal structure in electrical contact with the first source/drain structure or the second source/drain structure, wherein the fifth metal structure is formed concurrently with the formation of the third metal gate.
10. The method of claim 1 , wherein forming the semiconductor shell further comprises forming an outer shell surrounded by a second metal gate, and comprises forming a first source/drain structure and a second source/drain structure, the method further comprising:
forming the metal gate that surrounds the dielectric structure;
forming a third metal structure extending through the dielectric structure to be in electrical contact with the metal gate;
forming a fourth metal structure in electrical contact with the second metal gate; and
forming a fifth metal structure in electrical contact with the first source/drain structure or the second source/drain structure.
11. A semiconductor device, comprising:
a semiconductor shell separated from a substrate and extending along a vertical direction;
a first metal structure surrounded by a lower end portion of the semiconductor shell;
a dielectric structure above the first metal structure surrounded by the semiconductor shell;
a metal gate around an inner sidewall of the semiconductor shell; and
a second metal structure extending along the vertical direction, wherein the second metal structure in electrical contact with the first metal structure and is separated from the metal gate.
12. The semiconductor device of claim 11 , wherein the semiconductor shell comprises a first source/drain structure and a second source/drain structure, the semiconductor device further comprises:
a third metal structure extending along the vertical direction and in electrical contact with a second metal gate around an outer sidewall of the semiconductor shell; and
a fourth metal structure extending along the vertical direction and in electrical contact with the first source/drain structure or the second source/drain structure.
13. The semiconductor device of claim 11 , wherein the semiconductor shell comprises a first source/drain structure and a second source/drain structure and wherein the metal gate further includes a portion extending along the vertical direction beyond a top of the semiconductor shell, the semiconductor device further comprises:
a third metal structure in electrical contact with the metal gate; and
a fourth metal structure extending along the vertical direction and in electrical contact with the first source/drain structure or the second source/drain structure.
14. The semiconductor device of claim 13 , further comprising:
a second semiconductor shell that extends along the vertical direction, wherein the second semiconductor shell comprises a third source/drain structure and a fourth source/drain structure and wherein the metal gate further includes a portion extending along the vertical direction beyond a top of the second semiconductor shell;
a fifth metal structure surrounded by a lower portion of the second semiconductor shell;
a second dielectric structure above the fifth metal structure;
a sixth metal structure in electrical contact with the metal gate;
a seventh metal structure in electrical contact with the third source/drain structure or the fourth source/drain structure; and
a power rail in electrical contact with the fifth metal structure;
wherein the power rail is disposed below the fifth metal structure.
15. The semiconductor device of claim 11 , wherein an outer shell of the semiconductor shell is surrounded by a second metal gate, and the semiconductor shell comprises a first source/drain structure and a second source/drain structure, the semiconductor device further comprises:
a third metal structure through the dielectric structure to be in electrical contact with the metal gate;
a fourth metal structure in electrical contact with the second metal gate; and
a fifth metal structure in electrical contact with the first source/drain structure or the second source/drain structure.
16. The semiconductor device of claim 11 , wherein an outer shell of the semiconductor shell is surrounded by a second metal gate, the semiconductor shell comprises a first source/drain structure and a second source/drain structure, and the metal gate includes a portion extending along the vertical direction beyond a top of the semiconductor shell and surrounded by the dielectric structure, the semiconductor device further comprises:
a third metal structure in electrical contact with the second metal gate;
a fourth metal structure in electrical contact with the metal gate;
a fifth metal structure in electrical contact with the first source/drain structure or the second source/drain structure; and
a power rail in electrical contact with the first metal structure;
wherein the power rail is disposed below the first metal structure.
17. The semiconductor device of claim 11 , wherein an outer shell of the semiconductor shell is surrounded by a second metal gate, the semiconductor shell comprises a first source/drain structure and a second source/drain structure, and the metal gate includes a portion extending along the vertical direction beyond a top of the semiconductor shell, and surrounded by the dielectric structure, the semiconductor device further comprises:
a third metal gate lined in an opening;
a third metal structure in electrical contact with the second metal gate;
a fourth metal structure in electrical contact with the third metal gate; and
a fifth metal structure in electrical contact with the first source/drain structure or the second source/drain structure, wherein the fifth metal structure is formed concurrently with the formation of the third metal gate.
18. The semiconductor device of claim 11 , wherein an outer shell of the semiconductor shell is surrounded by a second metal gate, the semiconductor shell comprises a first source/drain structure and a second source/drain structure, and the metal gate surrounds the dielectric structure, the semiconductor device further comprises:
a third metal structure extending through the dielectric structure to be in electrical contact with the metal gate;
a fourth metal structure in electrical contact with the second metal gate; and
a fifth structure in electrical contact with the first source/drain structure or the second source/drain structure.
19. A method for manufacturing semiconductor devices, the method comprising:
forming a first semiconductor shell and a second semiconductor shell that both extend along a vertical direction, wherein the first semiconductor shell and the second semiconductor shell are separated from a substrate;
forming a first metal structure and a second metal structure surrounded by a lower end portion of the first semiconductor shell and a lower end portion of the second semiconductor shell, respectively;
forming a first dielectric structure above the first metal structure surrounded by the first semiconductor shell;
forming a second dielectric structure above the second metal structure surrounded by the second semiconductor shell;
forming a first metal gate around an outer sidewall of the first semiconductor shell;
forming a second metal gate around an inner sidewall of the second semiconductor shell;
forming a third metal structure extending along the vertical direction, wherein the third metal structure is in electrical contact with the first metal structure and is separated from the first metal gate; and
forming a fourth metal structure extending along the vertical direction, wherein the fourth metal structure is in electrical contact with the second metal structure and is separated from the second metal gate.
20. The method of claim 19 , wherein the first semiconductor shell comprises a first source/drain structure and a second source/drain structure, and wherein the second semiconductor shell comprises a third source/drain structure and a fourth source/drain structure, the method further comprises:
forming a fifth metal structure extending along the vertical direction and in electrical contact with the first metal gate;
forming a sixth metal structure extending along the vertical direction and in electrical contact with the first source/drain structure or the second source/drain structure;
forming the second metal gate that further includes a portion extending along the vertical direction beyond a top of the second semiconductor shell;
forming a seventh metal structure in electrical contact with the second metal gate; and
forming an eighth metal structure extending along the vertical direction and in electrical contact with the third source/drain structure or the fourth source/drain structure.