Method and structure for straining carrier channel in vertical gate all-around device
Method and structure for enhancing channel performance in a vertical gate all-around device, which provides a device comprising: a source region; a drain region aligned substantially vertically to the source region; a channel structure bridging between the source region and the drain region and defining a substantially vertical channel direction; and a gate structure arranged vertically between the source region and the drain region and surrounding the channel structure. The channel structure comprises a plurality of channels extending substantially vertically abreast each other, each bridging the source region and the drain region, and at least one stressor interposed between each pair of adjacent channels and extending substantially along the vertical channel direction; the stressor affects lateral strain on the adjacent channels, thereby straining the channels in the vertical channel direction.
1. A method of improving carrier mobility in a semiconductor device, comprising:
in a semiconductor structure comprising a channel structure that defines a substantially vertical channel direction and a gate structure surroundingly arranged around the channel structure,
selectively etching the channel structure substantially along the vertical channel direction to form at least one vertically extending gap; and
filling the gap with gap-filling material to form at least one vertically extending stressor in the channel structure, the stressor affecting a lateral strain in the channel structure, thereby straining the channel structure in the vertical direction.
2. The method of claim 1 , wherein the selective etching forms a plurality of vertically extending gaps.
3. The method of claim 2 , wherein
the gaps are disposed at substantially constant intervals along the lateral length of the channel structure, and
the gaps structurally divide the channel structure into a plurality of vertically extending channel portions of substantially identical width.
4. The method of claim 1 , wherein the gap filling process comprises:
forming a spacer layer of a first dielectric material in the gap, and
fully filling the gap with a second gap-filling material.
5. The method of claim 4 , wherein the filling of the gap with the second gap-filling material comprises performing an epitaxial growth process or performing a deposition process.
6. The method of claim 1 , wherein the stressor provides a lateral compressive strain, thereby causing vertical tensile strain in the channel structure.
7. The method of claim 1 , wherein the stressor provides a lateral tensile strain, thereby causing vertical compression strain in the channel structure.
8. A method of improving carrier mobility in a semiconductor device, comprising:
in a semiconductor structure comprising a channel structure that defines a substantially vertical channel direction,
etching the channel structure along the vertical channel direction to form at least one gap; and
filling the gap with gap-filling material to form a stressor in the channel structure, the stressor affecting a lateral strain in the channel structure.
9. The method of claim 8 , wherein the etching forms a plurality of vertically extending gaps.
10. The method of claim 9 , wherein
the plurality of vertically extending gaps are disposed at substantially constant intervals along the lateral length of the channel structure, and
the gaps structurally divide the channel structure into a plurality of vertically extending channel portions of substantially identical width.
11. The method of claim 8 , wherein the filling of the gap comprises:
forming a spacer layer of a first dielectric material in the gap, and
fully filling the gap with a second gap-filling material.
12. The method of claim 11 , wherein the filling of the gap with the second gap-filling material comprises performing an epitaxial growth process or performing a deposition process.
13. The method of claim 8 , wherein the stressor provides a lateral compressive strain, thereby causing vertical tensile strain in the channel structure.
14. The method of claim 8 , wherein the stressor provides a lateral tensile strain, thereby causing vertical compression strain in the channel structure.
15. A method comprising:
in a semiconductor structure comprising a channel that defines a vertical channel direction,
selectively etching the channel along the vertical channel direction to form at least one gap; and
forming a stressor in the channel by filling the gap with material, the stressor straining the channel in the vertical channel direction.
16. The method of claim 15 , wherein the selective etching forms a plurality of vertically extending gaps.
17. The method of claim 16 , wherein
the gaps are disposed at substantially constant intervals along the lateral length of the channel, and
the gaps structurally divide the channel into a plurality of vertically extending channel portions of substantially identical width.
18. The method of claim 15 , wherein the filling of the gap comprises:
forming a spacer layer of a first dielectric material in the gap, and
fully filling the gap with a second gap-filling material.
19. The method of claim 15 , wherein the stressor provides a lateral compressive strain, thereby causing vertical tensile strain in the channel.
20. The method of claim 15 , wherein the stressor provides a lateral tensile strain, thereby causing vertical compression strain in the channel.