Packaged electronic devices having transient liquid phase solder joints and methods of forming same
A packaged electronic device comprises a power semiconductor die that includes a first terminal and a second terminal, a power substrate comprising a dielectric substrate having a first metal cladding layer on an upper surface thereof, an encapsulation covering the power semiconductor die and at least a portion of the power substrate, a first lead extending through the encapsulation that is electrically connected to the first terminal, and a second lead extending through the encapsulation that is electrically connected to the second terminal. The first terminal is bonded to the first lead via a first transient liquid phase solder joint.
1 . A packaged electronic device, comprising:
a power semiconductor die that comprises a first terminal and a second terminal;
a power substrate comprising a dielectric substrate having a first metal cladding layer on a first surface of the dielectric substrate; and
a package that includes:
a first lead that is electrically connected to the first terminal;
a second lead that is electrically connected to the second terminal; and
an overmold encapsulation that is on at least an upper surface and side surfaces of the power substrate,
wherein the first terminal is bonded to a first end of the first lead via a first transient liquid phase solder joint, and
wherein the first lead extends through the overmold encapsulation so that a second end of the first lead is outside the overmold encapsulation.
2 . The packaged electronic device of claim 1 , wherein the power semiconductor die comprises a metal oxide semiconductor field effect transistor (“MOSFET”).
3 . The packaged electronic device of claim 2 , wherein the first terminal comprises a first source/drain terminal, the first lead comprises a first source/drain lead, the second terminal comprises a gate terminal, and the second lead comprises a gate lead.
4 . The packaged electronic device of claim 2 , wherein the first terminal comprises a gate terminal, the first lead comprises a gate lead, the second terminal comprises a first source/drain terminal, and the second lead comprises a first source/drain lead.
5 . The packaged electronic device of claim 2 , wherein the second terminal is bonded to the second lead via a second transient liquid phase solder joint.
6 . The packaged electronic device of claim 5 , wherein the MOSFET further comprises a second source/drain terminal that is bonded to the first metal cladding layer via a third transient liquid phase solder joint.
7 . The packaged electronic device of claim 6 , further comprising a second source/drain lead that is electrically connected to the first metal cladding layer via a fourth transient liquid phase solder joint.
8 . The packaged electronic device of claim 1 , wherein the second terminal is bonded to the second lead via a second transient liquid phase solder joint.
9 . The packaged electronic device of claim 3 , wherein the MOSFET further includes a second source/drain terminal that is bonded to the first metal cladding layer via a third transient liquid phase solder joint.
10 . The packaged electronic device of claim 3 , further comprising a second source/drain lead that is electrically connected to the first metal cladding layer via a fourth transient liquid phase solder joint.
11 . The packaged electronic device of claim 1 , wherein the first terminal comprises a first multilayer terminal that comprises at least a first metal layer and a second metal layer positioned outwardly of the first metal layer, the second metal layer including copper and/or nickel.
12 . The packaged electronic device of claim 11 , wherein the first multilayer terminal further comprises a third metal layer that includes tin positioned outwardly of the second metal layer.
13 . The packaged electronic device of claim 11 , wherein the second terminal comprises a second multilayer terminal that comprises at least a first metal layer and a second metal layer positioned outwardly of the first metal layer, the second metal layer including copper and/or nickel.
14 . The packaged electronic device of claim 13 , wherein the second multilayer terminal further comprises a third metal layer that includes tin positioned outwardly of the second metal layer.
15 . The packaged electronic device of claim 1 , wherein the power semiconductor die comprises a semiconductor layer structure that includes silicon carbide.
16 . The packaged electronic device of claim 1 , wherein the first metal cladding layer comprises a first copper cladding layer, the power substrate further comprising a second copper cladding layer on a second surface of the dielectric substrate that is opposite the first surface.
17 . The packaged electronic device of claim 16 , wherein the power substrate further comprises a first metal braze layer between the dielectric substrate and the first copper cladding layer and a second metal braze layer between the dielectric substrate and the second copper cladding layer.
18 . The packaged electronic device of claim 1 , wherein the second lead is electrically connected to the second terminal via a bond wire.
19 . A method of packaging a power semiconductor die that comprises a first terminal and a second terminal, the method comprising:
providing a power substrate comprising a dielectric substrate having a first metal cladding layer on a first surface of the dielectric substrate;
attaching the second terminal to the first metal cladding layer;
providing a tin-containing preform between a first lead and the first terminal;
attaching the first lead to the first terminal via a first transient liquid phase solder joint,
wherein the first terminal comprises a copper or nickel layer that contacts the tin-containing preform.
20 . The packaged electronic device of claim 1 , wherein the first transient liquid phase solder joint comprises a first metal interposed between two outer metal layers, and wherein the first metal comprises tin.
21 . The packaged electronic device of claim 20 , wherein the two outer metal layers comprise copper and/or nickel.
22 . The packaged electronic device of claim 20 , wherein a melting point of the first transient liquid phase solder joint is greater than a melting point of the first metal.
23 . The method of claim 1 , wherein the first lead is held in place by the overmold encapsulation.
24 . The method of claim 19 , wherein the tin-containing preform comprises a stamped tin preform.
25 . A packaged electronic device, comprising:
a power semiconductor die that comprises a first terminal, a second terminal and a third terminal;
a power substrate comprising a dielectric substrate having a metal cladding layer on a first surface of the dielectric substrate; and
a package that includes:
a first lead that is connected to the first terminal via a first transient liquid phase solder joint; and
a second lead that is electrically connected to the second terminal via a second transient liquid phase solder joint;
a third transient liquid phase solder joint that connects the third terminal to the metal cladding layer; and
a third lead that is electrically connected to the metal cladding layer via a fourth transient liquid phase solder joint.
26 . The packaged electronic device of claim 25 , further comprising an overmold encapsulation, where the first lead, the second lead and the third lead extend through the overmold encapsulation.
27 . The packaged electronic device of claim 26 , where the first lead and the second lead are each floating leads.