Non-volatile memory with autonomous cycling
A memory die assembly, comprising a non-volatile memory structure, performs autonomous testing of the memory die assembly by repeatedly performing a group of tests for multiple cycles such that the group of tests includes programming, erasing and reading the non-volatile memory structure. Failure events from the tests are recorded by storing error data for each recorded failure event including a location in the non-volatile memory structure of the failure event, a type of test that failed and a cycle during which the failure event occurred.
1. A non-volatile storage apparatus, comprising:
a non-volatile memory structure;
one or more control circuits connected to the non-volatile memory structure to form a memory die assembly, the memory die assembly is separate from and configured to communicate with a memory controller, the one or more control circuits are configured to:
receive a request from outside the memory die assembly to perform autonomous testing of the memory die assembly;
in response to the request, repeatedly perform a group of tests for multiple cycles such that the group of tests includes programming, erasing and reading the non-volatile memory structure; and
record failure events from the tests by storing error data for each recorded failure event including a location in the non-volatile memory structure of the failure event, a type of test that failed and a cycle during which the failure event occurred; and
temporary data storage positioned in the memory die assembly, the non-volatile memory structure comprises multiple planes of non-volatile memory cells, the temporary data storage is divided into portions such that each portion is associated with one of the planes, for each cycle the one or more control circuits are configured to perform the group of tests for each of the multiple planes by performing a first test multiple times such that each time the first test is performed of the multiple times the first test is performed on a subset of the planes and error data for a failure event is stored in a portion of the temporary data storage associated with a plane not included in the subset of the planes, the planes in the subset of planes change over the multiple times the first test is performed.
2. The non-volatile storage apparatus of claim 1 , wherein:
the one or more control circuits are configured to, after performing the first test on a first subset of the planes and storing first error data for a first failure event from the first test on the first subset of the planes in a portion of the temporary data storage associated with a first other plane not included in the first subset of the planes, move the first error data from the portion of the temporary data storage associated with the first other plane not included in the first subset of the planes to a portion of the temporary data storage associated with a second other plane not included in a second subset of the planes and perform the first test on the second subset of the planes and store second error data for a second failure event from the first test on the second subset of the planes in the portion of the temporary data storage associated with a second other plane.
3. The non-volatile storage apparatus of claim 1 , wherein:
the one or more control circuits are configured to perform the first test on a subset of the planes by concurrently performing the first test on memory cells in a first plane, performing the first test on memory cells in a second plane, and performing the first test on memory cells in a third plane, and storing error data for a failure event in a portion of the temporary data storage associated with a fourth plane.
4. The non-volatile storage apparatus of claim 1 , wherein:
the first test is a programming test; and
each time the first test is performed of the multiple times a different randomly generated data pattern is used for programming.
5. The non-volatile storage apparatus of claim 1 , wherein:
the one or more control circuits are configured to move the error data for failure events to the non-volatile memory structure from the temporary data storage.
6. The non-volatile storage apparatus of claim 5 , wherein:
the one or more control circuits are configured to store multiple copies of the error data for failure events and multiple inverted copies of the error data for failure events in the non-volatile memory structure.
7. The non-volatile storage apparatus of claim 1 , wherein:
the one or more control circuits are configured to move the error data for failure events to the non-volatile memory structure from the temporary data storage in response to an amount of the error data for failure events being greater than a threshold quantity.
8. A non-volatile storage apparatus, comprising:
a non-volatile memory structure;
one or more control circuits connected to the non-volatile memory structure to form a memory die assembly, the memory die assembly is separate from and configured to communicate with a memory controller, the one or more control circuits are configured to:
receive a request from outside the memory die assembly to perform autonomous testing of the memory die assembly,
in response to the request, repeatedly perform a group of tests for multiple cycles such that the group of tests includes programming, erasing and reading the non-volatile memory structure, and
record failure events from the tests by storing error data for each recorded failure event including a location in the non-volatile memory structure of the failure event, a type of test that failed and a cycle during which the failure event occurred; and
volatile temporary data storage positioned in the memory die assembly, the non-volatile memory structure comprises multiple planes, each plane includes multiple blocks of non-volatile memory cells, the volatile temporary data storage is divided into portions such that each portion is associated with one of the planes, for each cycle: the one or more control circuits are configured to perform the group of tests for each of the multiple planes by performing a first test multiple times such that each time the first test is performed of the multiple times the first test is performed concurrently on three blocks in three different planes with error data for a failure event being stored in a portion of the volatile temporary data storage associated with a fourth plane not included in the three different planes.
9. The non-volatile storage apparatus of claim 1 , wherein:
the non-volatile memory structure is positioned on a first die; and
the one or more control circuits are positioned on a second die that is directly bonded to the first die, the second die is configured to communicate with the memory controller, the memory die assembly includes the first die and the second die.
10. The non-volatile storage apparatus of claim 1 , further comprising:
an integrated circuit tester connected to the one or more control circuits, the integrated circuit tester is configured to send the request to the one or more control circuits to perform autonomous testing of the memory die assembly.
11. A non-volatile storage apparatus, comprising:
a non-volatile memory structure including multiple planes of non-volatile memory cells;
temporary data storage; and
one or more control circuits connected to the non-volatile memory structure and the temporary data storage to form a memory die assembly, the memory die assembly is separate from and configured to communicate with a memory controller, the one or more control circuits are configured to:
receive a request from outside the memory die assembly to perform autonomous testing of the memory die assembly;
in response to the request, repeatedly perform a group of tests for multiple cycles such that the group of tests includes programming, erasing and reading the non-volatile memory structure; and
record failure events from the tests by storing error data for each recorded failure event including a location in the non-volatile memory structure of the failure event, a type of test that failed and a cycle during which the failure event occurred, for each cycle the one or more control circuits are configured to perform the group of tests by performing a first test multiple times such that each time the first test is performed of the multiple times the first test is performed on multiple planes and error data for a failure event is stored in the temporary data storage.