Multiple plated via arrays of different wire heights on a same substrate

1. An apparatus, comprising:

a first substrate having a conductive layer;

first plated conductors in a first region extending from a surface of the conductive layer;

second plated conductors in a second region extending from the surface of the conductive layer;

wherein the first plated conductors and the second plated conductors are external to the first substrate;

wherein the first region is disposed at least partially within the second region;

wherein the first plated conductors are of a first height;

wherein the second plated conductors are of a second height greater than the first height;

a second substrate coupled to first ends of the first plated conductors;

the second substrate having at least one electronic component coupled thereto;

a die coupled to second ends of the second plated conductors; and

the die located over the at least one electronic component.

2. The apparatus according to claim 1 , wherein the at least one electronic component includes a discrete passive component.

3. The apparatus according to claim 2 , wherein the second substrate includes a redistribution layer.

4. The apparatus according to claim 2 , wherein the second substrate includes an interposer.

5. The apparatus according to claim 1 , wherein the second substrate includes a redistribution layer.

6. The apparatus according to claim 5 , wherein the at least one electronic component includes a network of two discrete passive components selected from a resistor, a capacitor, or an inductor coupled to the redistribution layer.

7. The apparatus according to claim 1 , wherein the second substrate includes an interposer.

8. The apparatus according to claim 7 , wherein the at least one electronic component includes a network of two discrete passive components selected from a resistor, a capacitor, or an inductor coupled to the interposer.

9. The apparatus according to claim 1 , wherein:

the first plated conductors include a first plated layer; and

the second plated conductors include the first plated layer and a second plated layer thereover.

10. An apparatus, comprising:

a first substrate having a conductive layer;

first plated conductors in a first region extending from a surface of the conductive layer;

second plated conductors in a second region extending from the surface of the conductive layer;

wherein the first plated conductors and the second plated conductors are external to the first substrate;

wherein the first region is disposed at least partially within the second region;

wherein the first plated conductors are of a first height;

wherein the second plated conductors are of a second height greater than the first height;

a die coupled to first ends of the first plated conductors;

a second substrate coupled to second ends of the second plated conductors;

the second substrate having at least one electronic component coupled thereto; and

the second substrate located over the die.

11. The apparatus according to claim 10 , wherein the at least one electronic component includes a discrete passive component.

12. The apparatus according to claim 11 , wherein the second substrate includes a redistribution layer.

13. The apparatus according to claim 11 , wherein the second substrate includes an interposer.

14. The apparatus according to claim 10 , wherein the second substrate includes a redistribution layer.

15. The apparatus according to claim 14 , wherein the at least one electronic component includes a network of two discrete passive components selected from a resistor, a capacitor, or an inductor coupled to the redistribution layer.

16. The apparatus according to claim 10 , wherein the second substrate includes an interposer.

17. The apparatus according to claim 16 , wherein the at least one electronic component includes a network of two discrete passive components selected from a resistor, a capacitor, or an inductor coupled to the interposer.

18. The apparatus according to claim 10 , wherein:

the first plated conductors include a first plated layer; and

the second plated conductors include the first plated layer and a second plated layer thereover.

19. A method, comprising:

obtaining a first substrate;

forming a conductive layer on an upper surface of the first substrate;

forming a first resist layer on the conductive layer;

patterning the first resist layer to provide a first mask with first vias from an upper surface of the first resist layer down to an upper surface of the conductive layer;

through-mask plating in the first vias to provide first plated conductors in a first region extending from the upper surface of the conductive layer;

forming a second resist layer over the first plated conductors;

patterning the second resist layer to provide a second mask with second vias from an upper surface of the second resist layer down to upper surfaces of a subset of the first plated conductors;

through-mask plating in the second vias to provide second plated conductors in a second region extending down to the upper surfaces of and including the subset of the first plated conductors;

removing the first resist layer and the second resist layer;

removing portions of the conductive layer between the first plated conductors and the second plated conductors;

wherein the first plated conductors and the second plated conductors are external to the first substrate;

wherein the first region is disposed at least partially within the second region;

wherein the first plated conductors are of a first height;

wherein the second plated conductors are of a second height greater than the first height;

coupling a second substrate to first ends of the first plated conductors;

the second substrate having at least one electronic component coupled thereto;

coupling a die to second ends of the second plated conductors; and

wherein the die is located over the at least one electronic component.

20. The method according to claim 19 , wherein:

the first conductive layer is a seed layer or an adhesion layer; and

the removing of the first resist layer precedes the forming of the second resist layer.

21. An apparatus, comprising:

a first substrate;

first plated conductors on a first region of a surface of the first substrate, the first plated conductors directly coupled to the surface of the first substrate;

second plated conductors on a second region of the surface of the first substrate, the second plated conductors directly coupled to the surface of the first substrate;

wherein:

the first plated conductors and the second plated conductors are external to the first substrate;

the first region is disposed at least partially within the second region;

the first plated conductors are of a first height; and

the second plated conductors are of a second height greater than the first height;

a first electronic component coupled to ends of the first plated conductors;

a second substrate coupled to ends of the second plated conductors, the second substrate comprising a laminate substrate; and

a second electronic component coupled to the second substrate and located over the first electronic component.

22. The apparatus of claim 21, further comprising a support layer or molding layer disposed on the surface of the first substrate, wherein at least a portion of the second plated conductors is within the support layer or molding layer.

23. The apparatus of claim 21, further comprising an underfill layer disposed between the first electronic component and the second electronic component.

24. The apparatus of claim 21, further comprising an underfill layer disposed between the first electronic component and the second substrate.

25. The apparatus of claim 21, wherein the first electronic component is connected to the second electronic component via at least the first and second plated conductors.

26. The apparatus of claim 21, wherein the second substrate is coupled to the second electronic component via at least one wire.

27. The apparatus of claim 21, further comprising bump or ball interconnects disposed between and coupling the second substrate and the ends of the second plated conductors.

28. The apparatus of claim 21, wherein the first substrate comprises an interposer or a redistribution layer.

29. The apparatus of claim 21, wherein the second electronic component comprises a network of two discrete circuit elements.

30. An apparatus, comprising:

an interconnection component;

first plated conductors on a first region of a surface of the interconnection component, the first plated conductors directly coupled to the surface of the interconnection component;

second plated conductors on a second region of the surface of the interconnection component, the second plated conductors directly coupled to the surface of the interconnection component;

wherein:

the first plated conductors and the second plated conductors are external to the interconnection component;

the first region is disposed at least partially within the second region;

the first plated conductors are of a first height; and

the second plated conductors are of a second height greater than the first height;

a die coupled to ends of the first plated conductors;

a laminate substrate coupled to ends of the second plated conductors; and

an electronic component electrically connected to at least some of the second plated conductors and located over the die.

31. The apparatus of claim 30, further comprising a support layer or molding layer disposed on the surface of the interconnection component, wherein at least a portion of the second plated conductors is within the support layer or molding layer.

32. The apparatus of claim 30, further comprising an underfill layer disposed between the die and the electronic component.

33. The apparatus of claim 30, further comprising an underfill layer disposed between the die and the laminate substrate.

34. The apparatus of claim 30, wherein the laminate substrate is coupled to the die via at least one wire.

35. The apparatus of claim 30, wherein the electronic component is connected to the die via at least the first plated conductors.

36. The apparatus of claim 30, further comprising bump or ball interconnects disposed between and coupling the laminate substrate and the ends of the second plated conductors.

37. The apparatus of claim 30, wherein the interconnection component comprises an interposer or a redistribution layer.

38. The apparatus of claim 30, wherein the electronic component comprises a network of two discrete circuit elements.

39. The apparatus of claim 30, wherein the electronic component is a first electronic component, and wherein the apparatus further comprises a second electronic component electrically connected to at least some of the second plated conductors and located over the die.

40. The apparatus of claim 39, wherein the die is connected to the first and second electronic components via at least the first plated conductors.

41. The apparatus of claim 40, wherein the first and second electronic components are disposed at least partially outside of the first region.

42. The apparatus of claim 30, wherein a back surface of the die is at a third height between the first and second heights.

43. The apparatus of claim 42, further comprising a spacer over the back surface of the die, the spacer having a thickness substantially equal to the difference between the second and third heights.