IP Library Granted Patent US 12,114,435
Granted Patent B2
US 12,114,435 · App. 17/744,291 · Granted Oct 8, 2024

Surface mount technology method and magnetic carrier system

Inventors: Virgil Zhu (Shanghai, CN); Vincent Jiang (Shanghai, CN); Paul Qu (Shanghai, CN); Shixing Zhu (Shanghai, CN); Yuanheng Zhang (Shanghai, CN); Enoch He (Shanghai, CN); Yonglong Liu (Shanghai, CN); Lian Chen (Shanghai, CN); Guangqiang Li (Shanghai, CN); Jingyun Chen (Shanghai, CN)
Assignee: SANDISK TECHNOLOGIES, INC.
H05K3/3494B23K1/0016B23K37/04H05K3/341H05K3/3457B23K2101/42
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Quick Facts
Patent No.
US 12,114,435
App. No.
17/744,291
Granted
Oct 8, 2024
Kind
B2
Abstract

A method of soldering one or more components to a substrate includes providing a substrate and applying an amount of solder material to the top planar surface of the substrate. One or more electrical components are mounted to the solder material in a predetermined position and orientation. A carrier is provided having one or more magnets embedded therein. The substrate is positioned above the carrier such that each of the one or more magnets is positioned directly below a corresponding electrical component. A carrier cover is positioned above the substrate and the electrical components. The solder material is heated to a predetermined temperature for a predetermined amount of time during which each of the magnets exerts a magnetic force on a corresponding electrical component to maintain its orientation relative to the substrate. The magnets reduce the occurrence of tombstoning of the electrical components during heating of the solder material.

Claims (29)

1. A method of soldering one or more components to a substrate, the method comprising:

providing a substrate having a top planar surface and a bottom planar surface;

applying an amount of solder material to at least a portion of the top planar surface of the substrate;

mounting one or more electrical components on the solder material, each of the one or more electrical components having a position and orientation relative to the substrate;

providing a carrier having a top carrier surface and a bottom carrier surface, and one or more magnets disposed between the top and bottom carrier surfaces;

positioning the substrate above the carrier such that the bottom planar surface of the substrate is above the top carrier surface and each of the one or more magnets is positioned directly below a corresponding electrical component of the one or more electrical components;

positioning a carrier cover above the top planar surface of the substrate such that there is a gap between the carrier cover and the one or more electrical components; and

heating the solder material to a predetermined temperature for a predetermined amount of time to cause the solder material to melt; and

during heating of the solder material, exerting, by each of the one or more magnets, a magnetic force on a corresponding electrical component of the one or more electrical components to maintain the orientation of the corresponding electrical component relative to the substrate while the solder material melts.

2. The method of claim 1 , wherein the magnets are configured to prevent tombstoning of the one or more electrical components during the heating step.

3. The method of claim 1 , wherein the one or more magnets includes a first magnet and a second magnet positioned adjacent to the first magnet, wherein the one or more electrical components includes a first electrical component corresponding to the first magnet and a second electrical component corresponding to the second magnet, and

wherein the magnetic force exerted by the first magnet does not affect the position or orientation of the second electrical component corresponding to the second magnet.

4. The method of claim 1 , wherein the gap between the carrier cover and the one or more electrical components is about 10 micrometers.

5. The method of claim 1 , wherein each of the one or more magnets disposed within the carrier have a maximum operating temperature that is greater than the predetermined temperature that the solder material is heated to during the heating step.

6. The method of claim 1 , wherein each of the one or more magnets disposed within the carrier have a maximum operating temperature of at least 350 degrees Celsius.

7. The method of claim 1 , wherein each of the one or more magnets disposed within the carrier have a magnetic force between about 336*10 −6 N to about 865*10 −6 N.

8. The method of claim 1 , wherein the heating step includes positioning the substrate having the one or more electrical components mounted thereto via the solder material, the carrier and the carrier cover in a reflow oven and operating the reflow oven to cause the solder material to melt.

9. A method for soldering one or more electrical components to a substrate comprising an amount of solder material coupling the one or more electrical components to the substrate, the method comprising:

positioning a carrier below the substrate, the carrier including one or more magnets embedded therein, each of the one or more magnets positioned directly below a corresponding electrical component of the one or more electrical components;

positioning a carrier cover above the substrate and spaced from the substrate such that there is a gap between the carrier cover and the one or more electrical components; and

heating the solder material to a predetermined temperature for a predetermined amount of time to cause the solder material to melt,

wherein during heating of the solder material each of the one or more magnets exerts a magnetic force on a corresponding electrical component of the one or more electrical components to maintain the orientation of the corresponding electrical component relative to the substrate while the solder material flows about the corresponding electrical component.

10. The method of claim 9 , wherein the magnets are configured to prevent tombstoning of the one or more electrical components during the heating step.

11. The method of claim 9 , wherein the magnets are configured to prevent the one or more electrical components from shifting in a direction that is transverse to the top planar surface of the substrate during the heating step.

12. The method of claim 9 , wherein the gap between the carrier cover and the one or more electrical components is about 10 micrometers.

13. The method of claim 9 , wherein each of the one or more magnets embedded within the carrier have a maximum operating temperature that is greater than the predetermined temperature that the solder material is heated to during the heating step.

14. The method of claim 9 , wherein each of the one or more magnets embedded within the carrier have a maximum operating temperature of at least 350 degrees Celsius.

15. The method of claim 9 , wherein each of the one or more magnets embedded within the carrier have a magnetic force between about 336*10 −6 N to about 865*10 −6 N.

16. The method of claim 9 , wherein the heating step includes positioning the substrate having the one or more electrical components mounted thereto via the solder material, the carrier and the carrier cover in a reflow oven and operating the reflow oven to cause the solder material to melt.

Assignments (8)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 18, 2022
From: ZHU, VIRGIL; JIANG, VINCENT; QU, PAUL; ZHU, SHIXING; ZHANG, YUANHENG; HE, ENOCH; LIU, YONGLONG; CHEN, LIAN; LI, GUANGQIANG; CHEN, JINGYUN
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059942/0167 →
Continuity (1)
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