IP Library Granted Patent US 11,947,830
Granted Patent B2
US 11,947,830 · App. 17/747,076 · Granted Apr 2, 2024

Key value data placement according to expected reads

Inventors: David Avraham (Even Yehuda, IL); Alexander Bazarsky (Holon, IL); Ran Zamir (Ramat Gan, IL)
Assignee: Western Digital Technologies, Inc.
G06F3/0655G06F3/0604G06F3/0679
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Quick Facts
Patent No.
US 11,947,830
App. No.
17/747,076
Granted
Apr 2, 2024
Kind
B2
Abstract

A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to receive key value (KV) pair data, group a plurality of KV pair data based on a data clustering value, aggregate the grouped plurality of KV pair data, and program the aggregated plurality of KV pair data to the memory device. A length of the KV pair data is less than a size of a flash management unit (FMU). The KV pair data includes a key and a value. Each KV pair data of the plurality of KV pair data has a length less than the size of the FMU. The received KV pair data is stored in a temporary location and grouped together in the temporary location. The grouping is based on a similarity of characteristics of plurality of KV pair data.

Claims (50)

1. A data storage device, comprising:

a memory device; and

a controller coupled to the memory device, wherein the controller is configured to:

receive key value (KV) pair data, wherein a length of the KV pair data is less than a size of a flash management unit (FMU), and wherein the KV pair data comprises a key and a value;

group a plurality of KV pair data based on a data clustering value, wherein each KV pair data of the plurality of KV pair data has a length less than the size of the FMU, wherein the data clustering value is based on at least one of a length of each KV pair data, a key index of each KV pair data, and internal patterns of a value of each KV pair data;

aggregate the grouped plurality of KV pair data; and

program the aggregated plurality of KV pair data to the memory device.

2. The data storage device of claim 1 , wherein the data clustering value for a first KV pair data is increased when a first length of the first KV pair data and a second length of a second KV pair data is within a predetermined length threshold.

3. The data storage device of claim 1 , wherein the data clustering value for a first KV pair data is increased when a first key index of the first KV pair data and a second key index of a second KV pair data are the same.

4. The data storage device of claim 1 , wherein the data clustering value for a first KV pair data is increased when a second metadata of a second KV pair data is within a predetermined threshold difference of a first metadata of the first KV pair data.

5. The data storage device of claim 1 , wherein the data clustering value for a first KV pair data is increased when at least a portion of an internal pattern of the first KV pair data and at least a portion of an internal pattern of a second KV pair data are the same.

6. The data storage device of claim 1 , wherein the controller is further configured to:

receive a first read command for a first KV pair data;

determine first characteristics of the first KV pair data;

generate a model based on the determined first characteristics of the first KV pair data;

receive a second read command for a second KV pair data;

determine second characteristics of the second KV pair data; and

update the model based on the determined second characteristics.

7. The data storage device of claim 6 , wherein the data clustering value is based on the updated model.

8. The data storage device of claim 1 , wherein the programming occurs after the aggregated grouped plurality of KV pair data reaches or exceeds the size of the FMU.

9. A data storage device, comprising:

a memory device; and

a controller coupled to the memory device, wherein the controller is configured to:

receive key value (KV) pair data, wherein a length of the KV pair data is less than a size of a flash management unit (FMU), and wherein the KV pair data comprises a key and a value;

group a plurality of KV pair data based on a data clustering value, wherein each KV pair data of the plurality of KV pair data has a length less than the size of the FMU, wherein the data clustering value is based on at least one of a length of each KV pair data, a key index of each KV pair data, a time difference of each KV pair data, metadata of each KV pair data, and internal patterns of a value of each KV pair data;

aggregate the grouped plurality of KV pair data; and

program the aggregated plurality of KV pair data to the memory device, wherein the data clustering value for a first KV pair data is increased when a time difference between the first KV pair data and a second KV pair data is less than or equal to a predetermined time threshold, and wherein the data clustering value for the first KV pair data is decreased when the time difference between the first KV pair data and the second KV pair data is greater than the predetermined time threshold.

10. A data storage device, comprising:

a memory device; and

a controller coupled to the memory device, wherein the controller is configured to:

receive key value (KV) pair data, wherein KV pair data comprises a key and a value;

determine characteristics of the received KV pair data;

determine a temporary storage location to store the received KV pair data, wherein the data storage device comprises two or more temporary storage locations, and wherein the determining is based on the determined characteristics of the received KV pair data;

assign the value of the KV pair data to an open flash management unit (FMU), wherein the open FMU is associated with the temporary storage location; and

encode and program the data of the open FMU to a selected location of the memory device after the open FMU is filled to writable capacity, wherein the received KV pair data includes a hint, and wherein the controller is configured to utilize the hint to determine the temporary storage location to store the received KV pair data.

11. The data storage device of claim 10 , wherein the two or more temporary storage locations are disposed in random access memory (RAM).

12. The data storage device of claim 10 , wherein the controller is further configured to maintain the two or more temporary storage locations in parallel.

13. The data storage device of claim 10 , wherein the two or more temporary storage locations are disposed in single level cell (SLC) memory of the memory device.

14. The data storage device of claim 13 , wherein the controller is further configured to aggregate KV pair data stored in the two or more temporary storage locations after receiving an indication for garbage collection, and wherein the aggregating is based on the determined characteristics of the KV pair data stored in the two or more temporary storage locations.

15. The data storage device of claim 10 , wherein determining the temporary storage location further comprises determining a relationship between a first predicted read time of a first KV pair data and a second predicted read time of a second KV pair data.

16. The data storage device of claim 15 , wherein the controller is further configured to, based on the determining the relationship, either:

assign a first value of the first KV pair data and a second value the second KV pair data to a same codeword or FMU;

assign the first value of the first KV pair data and the second value the second KV pair data to a same container; or

assign the first value of the first KV pair data to a first die and the second value of the second KV pair data to a second die, wherein the first die and the second die are accessed in parallel.

17. A data storage device, comprising:

memory means; and

a controller coupled to the memory means, wherein the controller is configured to:

aggregate key value (KV) pair data having a length less than a flash management unit (FMU) size in a storage location, wherein the aggregating is based on a relationship between a first KV pair data and a second KV pair data; and

program the aggregated KV pair data to the memory means when the aggregated KV pair data is equal to or greater than the FMU size, wherein the KV pair data includes a hint, and wherein the controller is configured to utilize the hint to determine a temporary storage location to store the KV pair data prior to programming to the memory means.

18. The data storage device of claim 17 , wherein the relationship is determined based on a first expected read time of the first KV pair data and a second expected read time of the second KV pair data.

Assignments (8)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 19, 2022
From: AVRAHAM, DAVID; BAZARSKY, ALEXANDER; ZAMIR, RAN
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059953/0964 →