Semiconductor structure and manufacturing method thereof

1. A method, comprising:

bonding a plurality of interposer dies to a first redistribution layer (RDL), each of the interposer dies comprising a substrate and a second RDL below the substrate;

encapsulating the first RDL and the interposer dies;

reducing a thickness of the substrate of each of the interposer dies; and

electrically coupling the interposer dies to a first semiconductor die,

wherein the reducing a thickness of the substrate of each of the interposer dies comprises thinning an encapsulating material encapsulating the first RDL and the interposer dies.

2. The method of claim 1 , wherein the encapsulating of the interposer dies comprises using a molding material to laterally surround the second RDL of each of the interposer dies.

3. The method of claim 2 , wherein the molding material separates the plurality of interposer dies from each other.

4. The method of claim 2 , wherein the bonding of the interposer dies to the first RDL comprises electrically coupling the first RDL to the second RDL through a plurality of conductive vias.

5. The method of claim 4 , wherein each of the interposer dies further comprises a plurality of caps to laterally surround the respective conductive vias.

6. The method of claim 1 , wherein the substrate of each of the interposer dies comprises bulk silicon.

7. The method of claim 6 , wherein the reducing of the thickness of the substrate of each of the interposer dies comprises removing an entirety of the substrate of each of the interposer dies.

8. A method, comprising:

forming an interposer die using a first substrate, the interposer die comprising a first redistribution layer (RDL) over the first substrate;

bonding the interposer die to a second RDL;

encapsulating the second RDL and the interposer die;

thinning the second RDL and the interpose die;

forming first connectors over the interposer die on a side opposite to the first RDL;

bonding a first semiconductor die with the first RDL through the first connectors;

encapsulating the first semiconductor die; and

forming external connectors to be electrically coupled to the interposer die through the second RDL.

9. The method of claim 8 , further comprising forming second connectors between the second RDL and the interposer die.

10. The method of claim 9 further comprising encapsulating the second connectors using a molded underfill material, wherein the encapsulating of the first RDL and the interposer die also encapsulates the molded underfill material.

11. The method of claim 10 , wherein a sidewall of the molded underfill material tapers from a first end near the second RDL to a second end near the interposer die.

12. The method of claim 10 , wherein an encapsulating material used for encapsulating the second RDL and the interposer die is different from the molded underfill material.

13. The method of claim 8 , wherein the thinning of the first RDL and the interposer die exposes the first RDL.

14. The method of claim 13 , further comprising forming a protective layer over a surface of the first RDL.

15. The method of claim 14 , further comprising forming conductive vias through the protective layer, the conductive vias electrically coupling the first semiconductor die to the first RDL through the first connectors.

16. A method, comprising:

forming a first interposer die, the first interposer die comprising:

a first substrate; and

a first redistribution layer (RDL) over the first substrate;

bonding the first interposer die to a second RDL;

encapsulating the second RDL and the first interposer die;

thinning the first RDL and the first interpose die to expose the first RDL;

forming connectors over the first interposer die on a side opposite to the second RDL;

bonding a first semiconductor die with the first RDL; and

encapsulating the first semiconductor die and the connectors.

17. The method of claim 16 , further comprising forming a plurality of interposer dies in a second substrate and separating the second substrate into a plurality of interposer dies including the first interposer die.

18. The method of claim 17 , wherein the forming of the plurality of interposer dies comprises forming caps on the first RDL of each of the interposer dies.

19. The method of claim 18 , wherein the forming of the plurality of interposer dies comprises forming metallization layers between each of the caps and the first RDL of each of the interposer dies.

20. The method of claim 1 , wherein the interposer die is electrically coupled to the first semiconductor die through a plurality of connectors.