IP Library › Granted Patent US 12,237,390
Granted Patent B2
US 12,237,390 · App. 17/750,028 · Granted Feb 25, 2025

Low resistance contact feature

Inventors: Szu-Wei Tseng (Hsinchu, TW); Wei-Yuan Lu (Taipei, TW); Wei-Yang Lee (Taipei, TW); Chia-Pin Lin (Hsinchu County, TW); Tzu-Wei Kao (Hsinchu County, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H01L29/42392H01L29/0661H01L29/0669H01L29/66545H01L29/66719H01L29/785H01L2029/7858
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Quick Facts
Patent No.
US 12,237,390
App. No.
17/750,028
Granted
Feb 25, 2025
Kind
B2
Abstract

Methods and semiconductor structures are provided. A method according to the present disclosure includes receiving a workpiece that includes a first gate structure disposed over a first active region, a second gate structure disposed over a second active region, a first gate spacer extending along a sidewall of the first gate structure and disposed at least partially over a top surface of the first active region, a second gate spacer extending along a sidewall of the second gate structure and disposed at least partially over a top surface of the second active region, and a source/drain feature. The method also includes treating a portion of the first gate spacer and a portion of the second gate spacer with a remote radical of hydrogen or oxygen, removing the treated portions, and after the removal, depositing a metal fill material over the source/drain feature.

Claims (64)

1. A method, comprising:

receiving a workpiece comprising:

a first dummy gate structure disposed over a first active region,

a second dummy gate structure disposed over a second active region,

a first gate spacer extending along a sidewall of the first dummy gate structure and disposed at least partially over a top surface of the first active region,

a second gate spacer extending along a sidewall of the second dummy gate structure and disposed at least partially over a top surface of the second active region,

a source/drain feature comprising a lower portion disposed between the first active region and the second active region and an upper portion disposed between the first gate spacer and the second gate spacer,

treating a portion of the first gate spacer and a portion of the second gate spacer with a remote radical of hydrogen or oxygen;

removing the treated portion of the first gate spacer and the treated portion of the second gate spacer; and

after the removal, depositing a metal fill material over the source/drain feature and between the first gate spacer and the second gate spacer.

2. The method of claim 1 , wherein the first gate spacer and the second gate spacer comprise silicon oxycarbide, silicon oxynitride, or silicon oxycarbonitride.

3. The method of claim 2 , wherein the treating comprises use of hydrogen radical or oxygen radical.

4. The method of claim 1 , wherein the removing comprises use of hydrogen fluoride.

5. The method of claim 1 , wherein the metal fill material comprises cobalt.

6. The method of claim 1 , further comprising:

after the depositing of the metal fill material, planarizing the workpiece to form a contact plug over the source/drain feature.

7. The method of claim 6 , wherein each of the first active region and the second active region includes a plurality of nanostructures disposed one over another.

8. The method of claim 1 , further comprising:

after the removing, depositing a contact etch stop layer (CESL) disposed over the source/drain feature; and

depositing a dielectric layer over the CESL.

9. The method of claim 8 , further comprising:

replacing the first dummy gate structure and the second dummy gate structure with a first metal gate structure and a second metal gate structure, respectively.

10. A method, comprising:

receiving a workpiece comprising:

a first polysilicon gate structure disposed over a first plurality of nanostructures,

a second polysilicon gate structure disposed over a second plurality of nanostructures,

a first gate spacer extending along a sidewall of the first polysilicon gate structure,

a second gate spacer extending along a sidewall of the second polysilicon gate structure,

a source/drain feature comprising a lower portion disposed between the first plurality of nanostructures and the second plurality of nanostructures along a direction and an upper portion disposed between the first gate spacer and the second gate spacer along the direction,

etching an outer portion of the first gate spacer and an outer portion of the second gate spacer, wherein the etching comprises:

treating the first gate spacer and the second gate spacer with a remote radical of hydrogen or oxygen to convert the outer portion of the first gate spacer into a first treated portion and the outer portion of the second gate spacer into a second treated portion, and

at least partially removing the first treated portions and the second treated portion; and

after the etching, forming a metal plug over the source/drain feature and between the first gate spacer and the second gate spacer.

11. The method of claim 10 , wherein the etching exposes a portion of a topmost nanostructure of the first plurality of nanostructures and a portion of a topmost nanostructure of the second plurality of nanostructures.

12. The method of claim 10 ,

wherein the upper portion comprises a first width along the direction,

wherein the lower portion comprises a second width along the direction,

wherein the first width is smaller than the second width.

13. The method of claim 12 ,

wherein the metal plug comprises a third width along the direction,

wherein the third width is greater than the first width.

14. The method of claim 10 ,

wherein the upper portion comprises a first width along the direction,

wherein the lower portion comprises a second width along the direction,

wherein the first width is greater than the second width.

15. The method of claim 14 ,

wherein the metal plug comprises a third width along the direction,

wherein the third width is greater than the first width.

16. The method of claim 10 ,

wherein the first gate spacer and the second gate spacer comprise silicon oxycarbonitride,

wherein the metal plug comprises cobalt.

17. A method, comprising:

receiving a structure comprising:

a first dummy gate over a first plurality of nanostructures,

a second dummy gate over a second plurality of nanostructures,

a first gate spacer along a sidewall of the first dummy gate,

a second gate spacer along a sidewall of the second dummy gate, and

a source/drain feature disposed between and in contact with the first plurality of nanostructures and the second plurality of nanostructures, an upper portion of the source/drain feature being disposed between the first gate spacer and the second gate spacer;

performing a treatment on the first gate spacer and the second gate spacer to form a first treated portion from the first gate spacer and a second treated portion from the second gate spacer, wherein the treatment is configured to break silicon-nitrogen bonding and silicon-carbon bonding;

removing the first treated portion and the second treated portion; and

after the removing, depositing a metal fill material over the source/drain feature.

18. The method of claim 17 , wherein the first gate spacer and the second gate spacer comprise silicon oxycarbonitride.

19. The method of claim 18 , wherein the first treated portion and the second treated portion comprise silicon oxide.

20. The method of claim 17 , wherein the treatment comprises use of hydrogen radical or oxygen radical.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2022
From: TSENG, SZU-WEI; LU, WEI-YUAN; LEE, WEI-YANG; LIN, CHIA-PIN; KAO, TZU-WEI
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 060037/0580 →
Continuity (2)
Provisional Application 63294102 · Dec 28, 2021
Related Publication 20230207653A1 · Jun 29, 2023
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