Micro semiconductor chip transfer substrate, display transferring structure, display device, and method of manufacturing the display device
According to an aspect of an embodiment, provided is a micro semiconductor chip transferring substrate including: a mold including a plurality of recesses formed to be recessed in a certain depth from an upper surface; and a surface energy reduction pattern formed in region between the plurality of recesses, on the upper surface, the surface energy reduction pattern including a plurality of uneven patterns. When the micro semiconductor chips are aligned by a wet alignment method, by such surface energy reduction pattern, sliding of the micro semiconductor chips toward the inside of the recesses may be improved.
1 . A micro semiconductor chip transferring substrate comprising:
a mold including a plurality of recesses formed to be recessed in a certain depth from an upper surface; and
a surface energy reduction pattern formed in region between the plurality of recesses, on the upper surface, the surface energy reduction pattern including a plurality of uneven patterns,
wherein a depth of each of the plurality of uneven patterns is same as a depth of each of the plurality of recesses.
2 . The micro semiconductor chip transferring substrate of claim 1 , wherein a width of each of the plurality of uneven patterns is 50% or less of a width of each of the plurality of recesses.
3 . The micro semiconductor chip transferring substrate of claim 1 , wherein a space between adjacent uneven patterns among the plurality of uneven patterns is less than a width of each of the plurality of recesses.
4 . The micro semiconductor chip transferring substrate of claim 3 , wherein the space between the adjacent uneven patterns among the plurality of uneven patterns, which is defined as s, satisfy a condition:
s <( w 1− w 2)/2
wherein, w 1 and w 2 refer to the widths of each recess and each uneven pattern, respectively.
5 . The micro semiconductor chip transferring substrate of claim 1 , wherein the surface energy reduction pattern includes a plurality of convex patterns protruded upwards from the upper surface.
6 . The micro semiconductor chip transferring substrate of claim 5 , wherein the plurality of convex patterns include a different material from a material of the mold.
7 . The micro semiconductor chip transferring substrate of claim 5 , wherein the plurality of convex patterns include a metal material.
8 . The micro semiconductor chip transferring substrate of claim 5 , wherein the surface energy reduction pattern further includes a filling pattern including a different material from a material of the plurality of convex patterns and filling regions between the plurality of convex patterns.
9 . The micro semiconductor chip transferring substrate of claim 1 , wherein the surface energy reduction pattern and the mold are integrally formed of a same material.
10 . The micro semiconductor chip transferring substrate of claim 9 , wherein the surface energy reduction pattern includes a plurality of concave patterns recessed from the upper surface of the mold to a lower portion.
11 . The micro semiconductor chip transferring substrate of claim 1 , wherein the surface energy reduction pattern is formed by roughing the upper surface of the mold.
12 . A display transferring structure comprising:
a micro semiconductor chip transferring substrate; and
a micro semiconductor chip arranged on any one of the plurality of recesses,
wherein the micro semiconductor chip transferring substrate includes:
a mold including a plurality of recesses formed to be recessed in a certain depth from an upper surface; and
a surface energy reduction pattern formed in region between the plurality of recesses, on the upper surface, the surface energy reduction pattern including a plurality of uneven patterns,
wherein a depth of each of the plurality of uneven patterns is same as a depth of each of the plurality of recesses.
13 . The display transferring structure of claim 12 , wherein the width of each uneven pattern is 50% or less of a width of the micro semiconductor chip.
14 . The display transferring structure of claim 12 , wherein the space between adjacent uneven patterns among the plurality of uneven patterns, which is defined as s, may satisfy a condition:
s ≤( w 3− w 2)/2
wherein, w 3 and w 2 refer to the widths of the micro semiconductor chip and each uneven pattern, respectively.
15 . The display transferring structure of claim 14 , further comprising a driving circuit configured to drive the micro semiconductor chip.
16 . The display transferring structure of claim 15 , wherein the driving circuit is arranged inside the micro semiconductor chip transferring substrate.
17 . The display transferring structure of claim 15 , further comprising a circuit board arranged under the micro semiconductor chip transferring substrate and including the driving circuit.
18 . A display device comprising:
the display transferring structure of claim 12 ;
a driving circuit configured to drive the micro semiconductor chip; and
a color conversion layer arranged on the transferring substrate.
19 . An electronic apparatus comprising the display device of claim 18 .