Method for fabricating semiconductor structure, and semiconductor structure
Embodiments relate to the field of semiconductor manufacturing technology, and more particularly, to a method for fabricating a semiconductor structure and a semiconductor structure. The method for fabricating a semiconductor structure provided by the embodiments of the present disclosure includes: providing a substrate including an array region and a peripheral region; forming a first mask layer covering the array region and the peripheral region on the substrate; forming a first device structure pattern on the first mask layer, and then forming a second device structure pattern on the first mask layer; and etching the substrate by using the first device structure pattern and the second device structure pattern as mask layer to form a peripheral region structure and an array region structure synchronously on the substrate. Technological processes are simplified, fabrication difficulties are reduced, and production efficiency is improved.
1. A method for fabricating a semiconductor structure, comprising:
providing a substrate comprising an array region and a peripheral region;
forming a first mask layer covering the array region and the peripheral region on the substrate;
forming a first mask pattern on the first mask layer;
forming a first dielectric layer on the first mask layer and the first mask pattern;
forming a second mask layer on the first dielectric layer of the array region;
forming a second mask pattern on the peripheral region; and forming a first device structure pattern on the first mask layer by using the second mask pattern as a mask;
forming a third mask layer on the first device structure pattern;
forming a third mask pattern on the array region, wherein the first device structure pattern is covered by the third mask layer; and forming a second device structure pattern on the first mask layer by using the third mask pattern as a mask; and
etching the substrate by using the first device structure pattern and the second device structure pattern as mask layer to form a peripheral region structure and an array region structure, respectively.
2. The method for fabricating a semiconductor structure according to claim 1 , wherein the first mask layer comprises an eleventh mask layer;
the eleventh mask layer on the peripheral region is etched by using the second mask pattern as the mask to form the first device structure pattern; and
the eleventh mask layer on the array region is etched by using the third mask pattern as the mask to form the second device structure pattern.
3. The method for fabricating a semiconductor structure according to claim 1 , wherein the forming a third mask pattern on the array region comprises:
removing a part of the second mask layer and the first dielectric layer positioned on a sidewall of the first mask pattern on the array region to form the third mask pattern.
4. The method for fabricating a semiconductor structure according to claim 3 , wherein the second mask layer comprises a twenty-first mask layer and a twenty-second mask layer, the twenty-first mask layer covering a top surface and a sidewall of the first dielectric layer, and the twenty-second mask layer being positioned above the twenty-first mask layer.
5. The method for fabricating a semiconductor structure according to claim 4 , wherein the twenty-second mask layer on the array region, the twenty-first mask layer on a top of the first mask pattern and the first dielectric are removed; and
the first dielectric layer positioned on the sidewall of the first mask pattern on the array region is removed to form the third mask pattern.
6. The method for fabricating a semiconductor structure according to claim 3 , wherein after forming a first mask pattern on the first mask layer, the method further comprises:
forming an initial twenty-first mask layer on the first mask pattern, forming a twenty-second mask layer on the initial twenty-first mask layer of the array region, and removing the initial twenty-first mask layer on the peripheral region to form the twenty-first mask layer.
7. The method for fabricating a semiconductor structure according to claim 1 , wherein the forming a second mask pattern on the peripheral region comprises:
removing the first mask pattern and a part of the first dielectric layer on the peripheral region, and retaining the first dielectric layer positioned on a sidewall of the first mask pattern to form a second mask pattern.
8. The method for fabricating a semiconductor structure according to claim 1 , wherein a pattern density of the first device structure pattern is smaller than a pattern density of the second device structure pattern.
9. The method for fabricating a semiconductor structure according to claim 8 , wherein a pattern density of the first mask pattern on the array region is the same as a pattern density of the first mask pattern on the peripheral region.
10. The method for fabricating a semiconductor structure according to claim 1 , wherein the first mask pattern comprises an elongated pattern.
11. The method for fabricating a semiconductor structure according to claim 1 , wherein the forming a first dielectric layer on the first mask layer and the first mask pattern comprises:
covering a part of surface of the first mask layer by the first mask pattern; and
conformally covering, by the first dielectric layer, a top surface and a sidewall of the first mask pattern and an exposed surface of the first mask layer.
12. The method for fabricating a semiconductor structure according to claim 2 , wherein the first mask layer comprises a twelfth mask layer positioned between the eleventh mask layer and the substrate; and
before etching the substrate by using the first device structure pattern and the second device structure pattern as mask layer, the twelfth mask layer is etched by using the first device structure pattern and the second device structure pattern as the masks.
13. The method for fabricating a semiconductor structure according to claim 1 , wherein the third mask layer is removed after forming the second device structure pattern.
14. The method for fabricating a semiconductor structure according to claim 1 , wherein the first mask layer comprises any combination of one or more of silicon oxide, dielectric anti-reflective coating, silicon oxynitride, amorphous carbon, and silicon nitride.
15. A semiconductor structure formed by means of a method for fabricating the semiconductor structure, the method comprises:
providing a substrate comprising an array region and a peripheral region;
forming a first mask layer covering the array region and the peripheral region on the substrate;
forming a first mask pattern on the first mask layer;
forming a first dielectric layer on the first mask layer and the first mask pattern;
forming a second mask layer on the first dielectric layer of the array region;
forming a second mask pattern on the peripheral region; and forming a first device structure pattern on the first mask layer by using the second mask pattern as a mask;
forming a third mask layer on the first device structure pattern;
forming a third mask pattern on the array region, wherein the first device structure pattern is covered by the third mask layer; and forming a second device structure pattern on the first mask layer by using the third mask pattern as a mask; and
etching the substrate by using the first device structure pattern and the second device structure pattern as mask layer to form a peripheral region structure and an array region structure, respectively.