IP Library Granted Patent US 11,847,323
Granted Patent B1
US 11,847,323 · App. 17/834,051 · Granted Dec 19, 2023

Data storage device and method for host buffer management

Inventors: Amir Segev (Meitar, IL); Shay Benisty (Beer Sheva, IL)
Assignee: Westem Digital Technologies, Inc.
G06F3/061G06F3/0656G06F3/0688
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Quick Facts
Patent No.
US 11,847,323
App. No.
17/834,051
Granted
Dec 19, 2023
Kind
B1
Abstract

A data storage device and method for host buffer management are provided. In one embodiment, a data storage device is provided comprising a non-volatile memory and a controller. The controller is configured to receive a read command from a host; read data from the non-volatile memory; identify a location in a host memory buffer (HMB) in the host that is available to store the data; write the data to the location in the HMB; and inform the host of the location in the HMB that stores the data. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

Claims (41)

1. A data storage device comprising:

a non-volatile memory; and

a controller configured to:

receive a read command from a host;

read data from the non-volatile memory;

identify a location in a host memory buffer (HMB) in the host that is available to store the data;

write the data to the location in the HMB;

inform the host of the location in the HMB that stores the data by sending, to the host, a pointer to the location; and

receive the pointer back from the host, wherein receiving the pointer back from the host is an indication that the location in the HMB can be released.

2. The data storage device of claim 1 , wherein the controller, not the host, is responsible for managing where the data is written in the host.

3. The data storage device of claim 1 , wherein the controller comprises:

a resource server configured to manage memory allocation in the HMB; and

direct memory access circuitry configured to send a request to the resource server to identify the location in the HMB that is available to store the data.

4. The data storage device of claim 1 , wherein the controller is further configured to inform the host of the location in the HMB by storing a completion queue entry in a completion queue, wherein the completion queue entry comprises the pointer.

5. The data storage device of claim 1 , wherein the controller is further configured to release the location in response to receiving the pointer back from the host.

6. The data storage device of claim 1 , wherein the controller is further configured to receive the read command by fetching the read command from a submission queue in the host in response to determining a doorbell register indicates that the read command is available to be fetched from the submission queue.

7. The data storage device of claim 1 , further comprising a volatile memory, wherein the controller is further configured to store the data in the volatile memory after the data is read from the non-volatile memory but before the data is written to the location in the HMB.

8. The data storage device of claim 1 , wherein the controller is further configured to error correct the data prior to writing the data to the location in the HMB.

9. The data storage device of claim 1 , wherein the data storage device comprises a solid-state drive (SSD).

10. The data storage device of claim 1 , wherein the non-volatile memory comprises a three-dimensional memory.

11. A method comprising:

performing the following in a host in communication with a data storage device:

generating a request for data stored in the data storage device;

receiving, from the data storage device, a pointer to a location in a memory in the host where the data storage device stored the data after executing the request;

reading the data from the location in the memory; and

informing the data storage device that the location in the memory can be released by sending the pointer back to the data storage device.

12. The method of claim 11 , wherein the data storage device, not the host, is responsible for managing where the data is written in the host.

13. The method of claim 11 , wherein a resource server in the data storage device is responsible for managing where the data is written in the host.

14. The method of claim 11 , wherein the memory in the host comprises a host memory buffer (HMB).

15. The method of claim 11 , wherein the pointer is received in a completion queue entry written in a completion queue by the data storage device.

16. The method of claim 11 , further comprising:

placing the read command in a submission queue; and

informing the data storage device that the read command is ready to be fetched from the submission queue.

17. A data storage device comprising:

a memory; and

means for responding to a read command from a host by:

reading data from the memory;

selecting a location in host memory that is available to store the data;

writing the data to the location in the host memory;

informing the host of the location in the host memory that stores the data by sending, to the host, a pointer to the location; and

receiving the pointer back from the host, wherein receiving the pointer back from the host is an indication that the location in a host memory buffer an be released.

Assignments (8)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 7, 2022
From: SEGEV, AMIR; BENISTY, SHAY
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 060120/0473 →
Cited By (1)
US 12,572,289