IP Library Granted Patent US 11,880,594
Granted Patent B2
US 11,880,594 · App. 17/840,303 · Granted Jan 23, 2024

Proactively biasing parameters of data storage device based on spatial position in storage enclosure

Inventors: Ramanathan Muthiah (Bangalore, IN); Sridhar Sabesan (Bangalore, IN); Dinesh Babu (Bangalore, IN); Pavan Gururaj (Bangalore, IN)
Assignee: Western Digital Technologies, Inc.
G06F3/0658G06F3/0625G06F9/30029G06F3/0679
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Quick Facts
Patent No.
US 11,880,594
App. No.
17/840,303
Granted
Jan 23, 2024
Kind
B2
Abstract

Disclosed are systems and methods for proactively, instead of reactively, biasing parameters of a data storage device based on a spatial position in a storage enclosure. The method includes obtaining a spatial position for the data storage device in a storage enclosure. The method also includes proactively biasing one or more parameters for controlling the device memory, based on the spatial position. The spatial position has a corresponding thermal profile that is predetermined.

Claims (59)

1. A data storage device, comprising:

a device memory; and

a controller configured to:

obtain a spatial position for the data storage device in a storage enclosure; and

proactively bias one or more parameters for controlling the device memory, based on the spatial position,

wherein:

the spatial position has a corresponding thermal profile; and

the corresponding thermal profile is predetermined.

2. The data storage device of claim 1 , further comprising a thermal map, wherein:

the thermal map maps each drive slot position within the storage enclosure to its corresponding thermal profile; and

each drive slot position corresponds to a respective spatial position for a respective data storage device in the storage enclosure.

3. The data storage device of claim 1 , wherein:

the controller is configured to determine the thermal profile based on a thermal map that has mapped each drive slot position within the storage enclosure to a corresponding thermal profile.

4. The data storage device of claim 3 , wherein:

the thermal map comprises a mapping of each drive slot position to the corresponding thermal profile;

the mapping is based on a static temperature analysis of the storage enclosure; and

the spatial position is one of the drive slot positions.

5. The data storage device of claim 3 , wherein the controller is further configured to update the thermal map.

6. The data storage device of claim 1 , wherein the one or more parameters include a parity control parameter for controlling a parity ratio of the device memory, based on the spatial position.

7. The data storage device of claim 6 , wherein the parity control parameter is for controlling error correction code (ECC) protection based on the spatial position and nodes of the device memory.

8. The data storage device of claim 6 , wherein for the parity control parameter, the controller is further configured to select an exclusive-or (XOR) protection pattern based on the spatial position.

9. The data storage device of claim 6 , wherein for the parity control parameter, the controller is further configured to:

select a linear pattern, instead of a checkerboard pattern, required for plane-to-plane shorts, while a memory block of the device memory is open, in accordance with a determination that the plane-to-plane shorts are not possible for underlying thermal conditions, based on the spatial position.

10. The data storage device of claim 1 , comprising a plurality of dies, wherein the one or more parameters include a parallelism control parameter for controlling die parallelism for the plurality of dies based on the spatial position, and wherein one of the plurality of dies comprises the device memory.

11. The data storage device of claim 1 , comprising a plurality of dies, wherein the one or more parameters include a parallelism control parameter for controlling, based on the spatial position, a variable die usage policy between reads and writes, and wherein one of the plurality of dies comprises the device memory.

12. The data storage device of claim 11 , wherein the parallelism control parameter is for restricting, based on the spatial position, a number of reads or writes in parallel allowed across the plurality of dies.

13. The data storage device of claim 1 , wherein:

the one or more parameters comprise one or more memory trim parameters associated with or for being used to control a NAND trim for using a different NAND programming voltage and a voltage window time for the device memory; and

the controller is configured to adjust the one or more memory trim parameters based on the spatial position.

14. The data storage device of claim 13 , for the one or more memory trim parameters:

when the device memory is healthy, the controller is configured to apply a first programming voltage and use a first voltage window time for the device memory;

when the device memory is not healthy, the controller is configured to apply a second programming voltage and use a second voltage window time for the device memory;

the first programming voltage is lower than the second programming voltage;

the first voltage window time is less than the second voltage window time; and

the healthy device memory is to operate at a temperature higher than a temperature of the not-healthy device memory.

15. The data storage device of claim 1 , wherein:

the one or more parameters is a clock frequency parameter;

the controller is configured to set a clock frequency of the data storage device based on the spatial position of the data storage device in the storage enclosure;

the storage enclosure is configured to store multiple data storage devices;

each of the multiple data storage devices is configured to use a corresponding clock frequency based on a corresponding spatial position in the storage enclosure; and

one of the multiple data storage devices comprises the data storage device.

16. The data storage device of claim 1 , wherein the one or more parameters are for controlling a storage density policy based on the spatial position, wherein the storage density policy is for determining whether the data storage device uses hybrid writes rather than triple-level cell (TLC) writes.

17. The data storage device of claim 1 , wherein:

proactively biasing the one or more parameters comprises adjusting at least one of a parity ratio, a memory refresh threshold, and cell voltage distributions, for an initial time period, based on the spatial position; and

the controller is further configured to adjust the one or more parameters, in accordance with a determination, after the initial time period, that a current operating range for the data storage device has reached a threshold range, wherein at least one of the one or more parameters comprises at least one of the following: die parallelism, a memory trim voltage, and a voltage time window, and a clock frequency.

18. The data storage device of claim 8 , wherein the controller is further configured to:

in accordance with a determination, after the initial time period, that the current operating range for the data storage device has not reached the threshold range, leave updates to at least one of the one or more parameters unchanged.

19. A method implemented using one or more controllers for one or more data storage devices, the method comprising:

obtaining a spatial position for the data storage device in a storage enclosure; and

proactively biasing one or more parameters for controlling a device memory, based on the spatial position,

wherein:

the spatial position has a corresponding thermal profile; and

the corresponding thermal profile is predetermined.

20. A system, comprising:

means for obtaining a spatial position for a data storage device in a storage enclosure; and

means for proactively biasing one or more parameters for controlling a device memory, based on the spatial position,

wherein:

the spatial position has a corresponding thermal profile; and

the corresponding thermal profile is predetermined.

Assignments (8)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2022
From: MUTHIAH, RAMANATHAN; SABESAN, SRIDHAR; BABU, DINESH; GURURAJ, PAVAN
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 060667/0032 →