IP Library › Granted Patent US 12,622,048
Granted Patent B2
US 12,622,048 · App. 17/852,658 · Granted May 5, 2026

Semiconductor device with multiple sheet patterns

Inventors: Jun Mo Park (Seoul, KR); Yeon Ho Park (Seoul, KR); Eun Sil Park (Hwaseong-si, KR); Jin Seok Lee (Busan, KR); Wang Seop Lim (Cheonan-si, KR); Kyu Bong Choi (Seoul, KR)
Assignee: Samsung Electronics Co., Ltd.
H10D84/83H01L21/02603H01L21/28088H10D30/014H10D30/031H10D30/43H10D30/6735H10D30/6739H10D30/6757H10D62/121H10D62/151H10D64/017H10D84/0128H10D84/013H10D84/014H10D84/038
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Quick Facts
Patent No.
US 12,622,048
App. No.
17/852,658
Granted
May 5, 2026
Kind
B2
Abstract

A semiconductor device includes first and second sheet patterns spaced apart from each other on a first region of the substrate, a first gate electrode extending between the first and second sheet patterns, third and fourth sheet patterns spaced apart from each other on a second region of the substrate, and a second gate electrode extending between the third and fourth sheet patterns. The first gate electrode includes a first work function controlling film, which is between the first and second sheet patterns, and a first filling conductive film on the first work function controlling film. The second gate electrode includes a second work function controlling film, which is between the third and fourth sheet patterns, and a second filling conductive film on the second work function controlling film. A distance between the third and fourth sheet patterns is greater than a distance between the first and second sheet patterns.

Claims (73)

1 . A semiconductor device comprising:

a substrate including a first region and a second region;

a first sheet pattern and a second sheet pattern on the first region of the substrate and extending in a first direction while being spaced apart from, and adjacent to, each other;

a first gate electrode extending in a second direction that intersects the first direction, the first gate electrode extending between the first sheet pattern and the second sheet pattern;

a third sheet pattern and a fourth sheet pattern on the second region of the substrate and extending in a third direction while being spaced apart from, and adjacent to, each other; and

a second gate electrode extending in a fourth direction that intersects the third direction, the second gate electrode extending between the third sheet pattern and the fourth sheet pattern,

wherein

the first gate electrode includes a first work function controlling film and a first filling conductive film on the first work function controlling film,

the first work function controlling film fills a gap between the first sheet pattern and the second sheet pattern,

the second gate electrode includes a second work function controlling film and a second filling conductive film,

the second work function controlling film fills a gap between the third sheet pattern and the fourth sheet pattern,

the second filling conductive film is on the second work function controlling film, and

a distance between the third sheet pattern and the fourth sheet pattern is greater than a distance between the first sheet pattern and the second sheet pattern.

2 . The semiconductor device of claim 1 , wherein a thickness of the second work function controlling film between the third sheet pattern and the fourth sheet pattern is greater than a thickness of the first work function controlling film between the first sheet pattern and the second sheet pattern.

3 . The semiconductor device of claim 1 , wherein

in a vertical direction intersecting a top surface of the substrate, a thickness of the third sheet pattern and a thickness of the fourth sheet pattern is less than a thickness of the first sheet pattern and a thickness of the second sheet pattern.

4 . The semiconductor device of claim 3 , wherein

a width in the second direction of the third sheet pattern and a width in the second direction of the fourth sheet pattern are less than a width in the fourth direction of the first sheet pattern and a width in the fourth direction of the second sheet pattern.

5 . The semiconductor device of claim 1 , wherein

the first sheet pattern and third sheet pattern are level with each other, and

the second sheet pattern and the fourth sheet pattern are level with each other.

6 . The semiconductor device of claim 1 , wherein a material in the first work function controlling film is the same as a material in the second work function controlling film.

7 . The semiconductor device of claim 6 , wherein a material in the first filling conductive film is the same as a material in the second filling conductive film.

8 . The semiconductor device of claim 1 , further comprising:

a first gate dielectric film between the first sheet pattern and the first gate electrode and between the second sheet pattern and the first gate electrode; and

a second gate dielectric film between the third sheet pattern and the second gate electrode and between the fourth sheet pattern and the second gate electrode,

wherein a thickness of the second gate dielectric film is greater than a thickness of the first gate dielectric film.

9 . A semiconductor device comprising:

a substrate including a first region and a second region;

a first sheet pattern and a second sheet pattern on the first region of the substrate and extending in a first direction while being spaced apart from, and adjacent to, each other;

a first gate electrode extending in a second direction that intersects the first direction, the first gate electrode extending between the first sheet pattern and the second sheet pattern;

a third sheet pattern and a fourth sheet pattern on the second region of the substrate and extending in a third direction while being spaced apart from, and adjacent to, each other; and

a second gate electrode extending in a fourth direction that intersects the third direction, the second gate electrode extending between the third sheet pattern and the fourth sheet pattern,

wherein

the first gate electrode includes a first work function controlling film and a first filling conductive film on the first work function controlling film,

the first work function controlling film (i) surrounds the first sheet pattern and the second sheet pattern and (ii) fills a gap between the first sheet pattern and the second sheet pattern,

the second gate electrode includes a second work function controlling film and a second filling conductive film on the second work function controlling film,

the second work function controlling film (i) surrounds the third sheet pattern and the fourth sheet pattern and (ii) fills a gap between the third sheet pattern and the fourth sheet pattern, and

a thickness of the second work function controlling film between the third sheet pattern and the fourth sheet patterns is greater than a thickness of the first work function controlling film between the first sheet pattern and the second sheet pattern.

10 . The semiconductor device of claim 9 , wherein a distance between the third sheet pattern and the fourth sheet pattern is greater than a distance between the first sheet pattern and the second sheet pattern.

11 . The semiconductor device of claim 9 , wherein in a vertical direction intersecting a top surface of the substrate, a thickness of the third sheet pattern and a thickness of the fourth sheet pattern is less than a thickness of the first sheet pattern and a thickness of the second sheet pattern.

12 . The semiconductor device of claim 9 , wherein

a thickness of the first work function controlling film on each of the first sheet pattern and the second sheet pattern is the same as a thickness of the second work function controlling film on each of the third sheet pattern and the fourth sheet pattern.

13 . The semiconductor device of claim 9 , wherein

the first work function controlling film includes a first sub-work function controlling film and a second sub-work function controlling film, which are sequentially formed on each of the first sheet pattern and the second sheet pattern, and

the second work function controlling film includes a third sub-work function controlling film and a fourth sub-work function controlling film, which are sequentially formed on each of the third sheet pattern and the fourth sheet pattern.

14 . The semiconductor device of claim 13 , wherein

the first sub-work function controlling film and the third sub-work function controlling film include TiN, and

the second sub-work function controlling film and fourth sub-work function controlling film include TiAlC.

15 . A semiconductor device comprising:

a substrate including a first region and a second region;

a plurality of first active patterns on the first region of the substrate and extending in a first direction while being spaced apart from each other;

a first gate electrode extending in a second direction that intersects the first direction, the first gate electrode extending between the plurality of first active patterns;

first source/drain regions connected to the plurality of first active patterns and on side surfaces of the first gate electrode;

a plurality of second active patterns on the second region of the substrate and extending in a third direction while being spaced apart from each other; and

a second gate electrode extending in a fourth direction that intersects the third direction, the second gate electrode extending between the plurality of second active patterns,

wherein

the first gate electrode includes a first work function controlling film and a first filling conductive film on the first work function controlling film,

the first work function controlling film surrounds each of the plurality of first active patterns and fills gaps between the plurality of first active patterns,

the second gate electrode includes a second work function controlling film and a second filling conductive film on the second work function controlling film,

the second work function controlling film surrounds each of the plurality of second active patterns and fills gaps between the plurality of second active patterns, and

a distance between the plurality of second active patterns is greater than a distance between the plurality of first active patterns.

16 . The semiconductor device of claim 15 , wherein in a vertical direction intersecting a top surface of the substrate, a thickness of the second active patterns is less than a thickness of the first active patterns.

17 . The semiconductor device of claim 15 , wherein

a material in the first work function controlling film is the same as a material in the second work function controlling film, and

a material in the first filling conductive film and is the same as a material in the second filling conductive film.

18 . The semiconductor device of claim 15 , wherein the second active patterns are on a same level as the first active patterns.

19 . The semiconductor device of claim 15 , further comprising:

second source/drain regions connected to the plurality of second active patterns and on side surfaces of the second gate electrode;

an interlayer insulating film covering the first source/drain regions and the second source/drain regions on the substrate;

first source/drain contacts connected to the first source/drain regions through the interlayer insulating film; and

second source/drain contacts connected to the second source/drain regions through the interlayer insulating film.

20 . The semiconductor device of claim 15 , wherein the first region and the second region are n-type field-effect transistor (NFET) regions.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 5, 2022
From: PARK, JUN MO; PARK, YEON HO; PARK, EUN SIL; LEE, JIN SEOK; LIM, WANG SEOP; CHOI, KYU BONG
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 060396/0657 →
Priority Claims (1)
KR 10-2021-0125581 · Sep 23, 2021 · national
Continuity (1)
Related Publication 20230086174A1 · Mar 23, 2023
References Cited (14)
US 9929245B2 · Colinge et al. · 2018 [cited by applicant]
US 10332803B1 · Xie · 2019 [cited by examiner]
US 10573747B2 · Steigerwald et al. · 2020 [cited by applicant]
US 10741660B2 · Loubet et al. · 2020 [cited by applicant]
US 10770290B2 · Lee et al. · 2020 [cited by applicant]
US 10825736B1 · Zhang et al. · 2020 [cited by applicant]
US 20210184001A1 · Trivedi et al. · 2021 [cited by applicant]
US 20220352314A1 · Hsu · 2022 [cited by examiner]
KR 1020200084532A · 2020 [cited by applicant]
KR 1020200113492A · 2020 [cited by applicant]
KR 1020200137256A · 2020 [cited by applicant]
KR 1020210075471A · 2021 [cited by applicant]
KR 1020210075840A · 2021 [cited by applicant]
Notice of Allowance in Korean Appln. No. 10-2021-0125581, mailed on Jan. 31, 2026, 5 pages (with English translation). [cited by applicant]