IP Library Granted Patent US 11,995,327
Granted Patent B2
US 11,995,327 · App. 17/854,312 · Granted May 28, 2024

Data storage device and method for adaptive host memory buffer allocation based on virtual function prioritization

Inventors: Shay Benisty (Beer Sheva, IL); Judah Gamliel Hahn (Ofra, IL); Ariel Navon (Revava, IL); Alexander Bazarsky (Holon, IL)
Assignee: Western Digital Technologies, Inc.
G06F3/0631G06F3/0617G06F3/0656G06F3/0659G06F3/0673
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Quick Facts
Patent No.
US 11,995,327
App. No.
17/854,312
Granted
May 28, 2024
Kind
B2
Abstract

A data storage device and method for adaptive host memory buffer allocation based on virtual function prioritization are provided. In one embodiment, a data storage device is provided comprising a memory, an interface, and a controller. The controller is configured to receive priority information of each of a plurality of virtual functions in the host and allocate space in the host memory buffer for each of the plurality of virtual functions based on the priority information. The controller is further configured to dynamically reallocate the space. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

Claims (34)

1. A data storage device comprising:

a memory;

an interface configured to communicate with a host comprising a host memory buffer; and

one or more processors configured, individually or in combination, to communicate with the memory and the interface, wherein the one or more processors are further configured, individually or in combination, to:

receive priority information of each virtual function of a plurality of virtual functions in the host; and

allocate space in the host memory buffer for each virtual function based on the priority information, wherein more space is allocated to a relatively-higher-priority virtual function than a relatively-lower-priority virtual function;

wherein:

the host memory buffer is allocated for exclusive use by the one or more processors; and

data stored in the host memory buffer by the one or more processors is not accessible proactively by the host.

2. The data storage device of claim 1 , wherein the one or more processors are further configured, individually or in combination, to dynamically reallocate the space allocated in the host memory buffer.

3. The data storage device of claim 2 , wherein the one or more processors are further configured, individually or in combination, to dynamically reallocate the space based on new priority information.

4. The data storage device of claim 2 , wherein the one or more processors are further configured, individually or in combination, to dynamically reallocate the space based on performance of at least one of the plurality of virtual functions.

5. The data storage device of claim 2 , wherein the one or more processors are further configured, individually or in combination, to reallocate the space during a background operation.

6. The data storage device of claim 2 , wherein the one or more processors are further configured, individually or in combination, to reallocate the space in a single operation cluster during a time dedicated by the host.

7. The data storage device of claim 1 , wherein the plurality of virtual functions is associated with a single-root input/output virtualization (SR-IOV) system.

8. The data storage device of claim 1 , wherein the one or more processors are further configured, individually or in combination, to use the space allocated for one of the plurality of virtual functions to cache a flash translation layer entry that is specific to a namespace associated with that virtual function.

9. The data storage device of claim 1 , wherein the one or more processors are further configured, individually or in combination, to use the space allocated for one of the plurality of virtual functions to cache recently-read data for that virtual function.

10. The data storage device of claim 1 , wherein the one or more processors are further configured, individually or in combination, to use the space allocated for one of the plurality of virtual functions to store control data for that virtual function.

11. The data storage device of claim 1 , wherein the one or more processors are further configured, individually or in combination, to use the space allocated for one of the plurality of virtual functions to store read-look-ahead data for that virtual function.

12. The data storage device of claim 1 , wherein the one or more processors are further configured, individually or in combination, to use the space allocated for one of the plurality of virtual functions to store history pattern matcher data for that virtual function.

13. The data storage device of claim 1 , wherein the memory comprises a three-dimensional memory.

14. A method comprising:

performing the following in a data storage device in communication with a host comprising a host memory and running a plurality of virtual functions:

allocating space in the host memory for each virtual function of the plurality of virtual functions based on a respective priority of each virtual function; and

dynamically reallocating the space allocated in the host memory in a single operation cluster during a time dedicated by the host.

15. The method of claim 14 , wherein the space is dynamically reallocated based on new priority information regarding at least one of the plurality of virtual functions.

16. The method of claim 14 , wherein the space is dynamically reallocated based on performance of at least one of the plurality of virtual functions.

17. The method of claim 14 , wherein the space is dynamically reallocated during a background operation.

18. The method of claim 14 , wherein the plurality of virtual functions is associated with a single-root input/output virtualization (SR-IOV) system.

19. A data storage device comprising:

a memory;

means for allocating space in host storage for each virtual function of a plurality of virtual functions based on a priority associated with each virtual function; and

means for using use the space allocated for one of the plurality of virtual functions to cache a flash translation layer entry that is specific to a namespace associated with that virtual function, cache recently-read data and/or recently-written data for that virtual function, store control data for that virtual function, store read-look-ahead data for that virtual function, and/or store history pattern matcher data for that virtual function.

20. The data storage device of claim 1 , wherein the one or more processors are further configured, individually or in combination, to use the space allocated for one of the plurality of virtual functions to cache recently-written data for that virtual function.

Assignments (8)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2022
From: BENISTY, SHAY; HAHN, JUDAH GAMLIEL; NAVON, ARIEL; BAZARSKY, ALEXANDER
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 060370/0098 →
Continuity (1)
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