IP Library Granted Patent US 11,928,342
Granted Patent B2
US 11,928,342 · App. 17/889,088 · Granted Mar 12, 2024

Power target calibration for controlling drive-to-drive performance variations in solid state drives (SSDs)

Inventors: Rodney Brittner (San Jose, CA); Reed Tidwell (Centerville, UT)
Assignee: Western Digital Technologies, Inc.
G06F3/0625G06F1/3221G06F3/0634G06F3/0679
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Quick Facts
Patent No.
US 11,928,342
App. No.
17/889,088
Granted
Mar 12, 2024
Kind
B2
Abstract

To provide more uniform performance levels for solid state drive (SSDs), the static power level used by an SSD in an idle state is measured and used to determine a static power offset for each of the drives. The static power offset is set as a parameter for the SSD and used to offset a received power supply level for use on the drive. For a data storage system of multiple SSDs, a common scaling factor can be used to set the degree to which the static power offset is implemented, allowing for a choice between uniformity of power and uniformity of performance for the SSDs of a data storage system.

Claims (71)

1. A method, comprising:

measuring a first amount of power drawn by a non-volatile memory drive when in an idle state and set at a first temperature value;

measuring a second amount of power drawn by the non-volatile memory drive when in the idle state and set at a second temperature value, the second temperature value being different than the first temperature value;

performing a comparison of the first amount of power to a first nominal power value;

performing a comparison of the second amount of power to a second nominal power value;

based on the comparison of the first amount of power to the first nominal power value, determining a first static power offset value for the non-volatile memory drive;

based on the comparison of the second amount of power to the second nominal power value, determining a second static power offset value for the non-volatile memory drive;

storing the first and the second static power offset values as parameter values on the non-volatile memory drive; and

configuring the non-volatile memory drive to:

offset a received power supply level based on either the first static power offset value or the second static power offset value;

select from the first and the second static power offset values; and

operate the non-volatile memory drive using the offset received power supply level offset by the selected static power offset value.

2. The method of claim 1 , further comprising:

determining a temperature value for the non-volatile memory drive, wherein selecting from the first and the second static power offset values is based on the determined temperature value.

3. The method of claim 2 , wherein the non-volatile memory drive comprises a temperature sensor, the temperature value being determined by the temperature sensor.

4. The method of claim 1 , further comprising:

receiving a controller circuit and one or more non-volatile memory dies; and

assembling the non-volatile memory drive from the controller circuit and one or more non-volatile memory dies prior to measuring the first amount of power.

5. The method of claim 4 , wherein storing the first static power offset value includes setting a fuse value on the controller circuit of the non-volatile memory drive.

6. The method of claim 1 , wherein the Currently Amended memory drive comprises a power sensor configured to measure the first amount of power drawn.

7. The method of claim 1 , further comprising:

receiving a scale factor; and

scaling the received power supply level by the scale factor.

8. The method of claim 7 , wherein:

the scale factor has a value in a range of zero to one;

a value of zero corresponds to no offset of the received power supply level; and

a value of one corresponds to offsetting the received power supply level by a full amount of one of the power offset parameter values.

9. The method of claim 1 , wherein the measuring the first amount of power drawn by the non-volatile memory drive when in an idle state and set at the first temperature value and the measuring the second amount of power drawn by the non-volatile memory drive when in the idle state and set at the second temperature value are both performed as part of a device characterization process.

10. A data storage system, comprising:

a system power supply configured to provide a system voltage supply level; and

a non-volatile memory drive connected to receive the system voltage supply level, the non-volatile memory drive configured to:

measure a first amount of power drawn by the non-volatile memory drive when in an idle state and at a first temperature;

measure a second amount of power drawn by the non-volatile memory drive when in the idle state and at a second temperature, where the second temperature is different than the first temperature;

perform a comparison of the first amount of power to a first nominal power value;

perform a comparison of the second amount of power to a second nominal power value;

based on the comparison of the first amount of power to the first nominal power value, determine a first static power offset value for the non-volatile memory drive;

based on the comparison of the second amount of power to the corresponding second nominal power value, determine a corresponding second static power offset value for the non-volatile memory drive;

store the first static power offset value and the second static power offset as parameter values on the non-volatile memory drive;

offset the system voltage supply level based on either the first static power offset value or the second static power offset value;

select from the first and the second static power offset values; and

operate the non-volatile memory drive using the system voltage supply level offset by the selected one of the first static power offset value or the second static power offset value.

11. The data storage system of claim 10 , the non-volatile memory drive further configured to:

determine a temperature value for the non-volatile memory drive;

select from the first and the second static power offset values based on the determined temperature value; and

operate the non-volatile memory drive using the selected static power offset value.

12. The data storage system of claim 11 , wherein the non-volatile memory drive comprises a temperature sensor, the temperature value being determined by the temperature sensor.

13. The data storage system of claim 12 , the non-volatile memory drive comprising:

a controller circuit; and

one or more non-volatile memory dies.

14. The data storage system of claim 13 , the controller circuit of the non-volatile memory drive configured to comprise a fuse value configured to store the first static power offset value.

15. The data storage system of claim 13 , wherein the temperature sensor is on the controller circuit.

16. The data storage system of claim 10 , wherein the non-volatile memory drive comprises a power sensor configured to measure the first amount of power drawn.

17. The data storage system of claim 10 , the non-volatile memory drive further configured to:

receive a scale factor; and

scale the received system voltage supply level by the scale factor.

18. The data storage system of claim 17 , wherein:

the scale factor has a value in a range of zero to one;

a value of zero corresponds to no offset of the received power supply level; and

a value of one corresponds to offsetting the received power supply level by a full amount of one of the power offset parameter values.

19. A data storage system, comprising:

means for providing a system voltage supply level; and

a plurality of non-volatile memory drives connected to receive the system voltage supply level, each of the non-volatile memory drives comprising:

means for measuring first and second amounts of power drawn by a non-volatile memory drive when in an idle state and respectively at a first temperature and a second temperature, where the second temperature is different than the first temperature;

means for performing a comparison of the first amount of power to a first nominal power value and a comparison of the second amount of power to a second nominal power value;

means for determining, based on the comparison of the first amount of power to the first nominal power value, a first static power offset value for the non-volatile memory drive and, based on the comparison of the second amount of power to the second nominal power value, a second static power offset value for the non-volatile memory drive;

means for storing the first and the second static power offset values as parameter values on the non-volatile memory drive; and

means for configuring the non-volatile memory drive to offset the system voltage supply level based on either the first static power offset value or the second static power offset value; and

means for operating the non-volatile memory drive using the system voltage supply level offset by a selected one of either of the first static power offset value or the second static power offset value.

20. The data storage system of claim 19 , wherein each of the non-volatile memory drives further comprises:

means for determining a temperature value for the non-volatile memory drive; and

means for selecting from the first and the second static power offset values based on the determined temperature value and operating the non-volatile memory drive using the selected static power offset value.

Assignments (8)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 16, 2022
From: BRITTNER, RODNEY; TIDWELL, REED
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 060824/0387 →