IP Library › Granted Patent US 12,550,696
Granted Patent B2
US 12,550,696 · App. 17/894,778 · Granted Feb 10, 2026

Patterning with self-assembled monolayer

Inventors: Dina H. Triyoso (Albany, NY); Robert D. Clark (Fremont, CA); Hirokazu Aizawa (Albany, NY)
Assignee: Tokyo Electron Limited
H01L21/76897H01L21/76811H01L21/76816H01L21/76831
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Quick Facts
Patent No.
US 12,550,696
App. No.
17/894,778
Granted
Feb 10, 2026
Kind
B2
Abstract

A method of processing a substrate that includes: selectively depositing a self-assembled monolayer (SAM) on a metal line of the substrate, the SAM being in contact with the metal line, a surface of the substrate further including a first dielectric material that surrounds the metal line; selectively depositing a second dielectric material over the first dielectric material; forming a dielectric layer by depositing a third dielectric material over the second dielectric material and the SAM; and patterning the dielectric layer.

Claims (43)

1 . A method of processing a substrate, the method comprising:

selectively depositing a self-assembled monolayer (SAM) on a metal line of the substrate, the SAM being in contact with the metal line, a surface of the substrate further comprising a first dielectric material that surrounds the metal line, wherein a molecule of the SAM comprises a carbon group, a bonding group coupled to the carbon group, and a terminal group coupled to the carbon group that is opposite the bonding group;

selectively depositing a second dielectric material over the first dielectric material;

forming a dielectric layer by depositing a third dielectric material over the second dielectric material and the SAM; and

patterning the dielectric layer, the patterning comprising

forming a first relief pattern over the dielectric layer, the first relief pattern to be transferred into the dielectric layer,

forming a second relief pattern over the first relief pattern, the second relief pattern to be transferred into the dielectric layer,

transferring the second relief pattern into the dielectric layer by etching through the dielectric layer selectively to the second dielectric material, and

transferring the first relief pattern into the dielectric layer by etching through the dielectric layer selectively to the second dielectric material.

2 . The method of claim 1 , wherein the substrate further comprises a metal oxide over the metal line, the method further comprising, prior to selectively depositing the self-assembled monolayer (SAM), performing a pretreatment to remove the metal oxide and expose the metal line.

3 . The method of claim 1 , wherein patterning the dielectric layer further comprises:

planarizing the dielectric layer.

4 . The method of claim 3 , wherein transferring the first relief pattern forms trenches in the dielectric layer, and wherein transferring the second relief pattern forms vias in the dielectric layer.

5 . The method of claim 4 , wherein patterning the dielectric layer forms fully self-aligned vias (FSAV), the method further comprising:

after transferring the second relief pattern, removing the second relief pattern;

after transferring the first relief pattern, removing the first relief pattern; and

filling the trenches and the vias with a metal.

6 . The method of claim 5 , further comprising, prior to filling the trenches and the vias, removing uncovered portions of the self-assembled monolayer (SAM) to expose top surfaces of the metal line.

7 . The method of claim 5 , wherein the substrate further comprises another metal line, and wherein filling the trenches and the vias with the metal forms an electrical connection between the metal line and the another metal line.

8 . The method of claim 1 , wherein the first dielectric material and the third dielectric material are a same material.

9 . The method of claim 1 , wherein the first dielectric material comprises Al 2 O 3 , SiO 2 , SiON, or SiOCN.

10 . The method of claim 1 , wherein the third dielectric material comprises Al 2 O 3 , SiO 2 , SiON, or SiOCN.

11 . The method of claim 1 , wherein the dielectric layer is in contact with the self-assembled monolayer (SAM).

12 . A method of processing a substrate, the method comprising:

loading a substrate in a processing chamber, the substrate comprising a first metal and a first dielectric material;

rotating the substrate;

while rotating the substrate, dispensing a solution containing self-assembled monolayer (SAM) molecules onto the substrate to deposit a SAM on the first metal, the SAM being in physical contact with the first metal;

dispensing a rinsing solution onto the substrate;

exposing the substrate to a vapor containing a second dielectric precursor to deposit a second dielectric material over the first dielectric material; and

exposing the substrate to another vapor containing a third dielectric precursor to deposit a third dielectric material over the second dielectric material and the SAM, the third dielectric precursor and the second dielectric precursor having different compositions.

13 . The method of claim 12 , wherein the self-assembled monolayer (SAM) has a thickness between 1 nm and 5 nm.

14 . The method of claim 12 , wherein the first metal comprises Cu, Al, Ta, Ti, W, Ru, Co, Ni, or Mo.

15 . The method of claim 12 , further comprising repeating the dispensing of the solution and the dispensing of the rinsing solution.

16 . The method of claim 12 , wherein the SAM molecules comprise a carbon group, a bonding group coupled to the carbon group, and a terminal group coupled to the carbon group that is opposite the bonding group.

17 . The method of claim 12 , further comprising patterning the second and the third dielectric materials to form fully self-aligned vias (FSAV) in the second and the third dielectric materials.

18 . A method of processing a substrate, the method comprising:

selectively depositing a self-assembled monolayer (SAM) on a metal of the substrate to physically contact the SAM with the metal, the substrate comprising the metal and a first dielectric material;

selectively depositing a second dielectric material over the first dielectric material;

depositing a diffusion barrier layer over the second dielectric material and the SAM, the diffusion barrier layer comprising a third dielectric material having a different composition from the second dielectric material;

forming a dielectric layer by depositing a fourth dielectric material over the diffusion barrier layer, the fourth dielectric material having a different composition than the third dielectric material; and

patterning the dielectric layer.

19 . The method of claim 18 , wherein the third dielectric material comprises SiCN.

20 . The method of claim 18 , wherein the diffusion barrier layer is in contact with the self-assembled monolayer (SAM).

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2022
From: TRIYOSO, DINA H.; CLARK, ROBERT D.; AIZAWA, HIROKAZU
To: TOKYO ELECTRON LIMITED
Reel/Frame 060891/0018 →
Continuity (2)
Provisional Application 63306590 · Feb 4, 2022
Related Publication 20230253250A1 · Aug 10, 2023
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