IP Library › Granted Patent US 12,658,805
Granted Patent B2
US 12,658,805 · App. 17/895,986 · Granted Jun 16, 2026

Soft switching for efficient non-CMOS based DC-DC converter

Inventor: Sally Safwat Amin (Hillsboro, OR)
Assignee: Intel Corporation
H02M3/1588H02M1/0058H02M1/08
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Quick Facts
Patent No.
US 12,658,805
App. No.
17/895,986
Granted
Jun 16, 2026
Kind
B2
Abstract

Embodiments herein relate to a voltage converter which includes a soft switching driver for a low-side transistor which is in series with a high-side transistor to provide a desired output voltage Vx. The soft switching driver receives Vx on a feedback path and includes a clipper transistor to clip or reduce a maximum voltage of Vx to Vxsen. A restore circuit can be used to effectively add back a threshold voltage drop of the clipper transistor which would otherwise occur by holding a source of the clipper transistor at Vdrv, a gate voltage of the clipper transistor. A zero-voltage switching circuit receives Vxsen to provide an output voltage which in turn sets a control gate voltage of the low-side transistor. The low-side and high-side transistors may be GaN-based while the soft switching driver is CMOS based.

Claims (38)

1 . An apparatus, comprising:

a high-side transistor and a low-side transistor in series;

an output node coupled between the high-side transistor and the low-side transistor;

a driver having an output coupled to a control gate of the low-side transistor, wherein the driver is configured to receive a voltage, Vx, of the output node on a feedback path and, in response to the voltage of the output node, provide soft switching of the low-side transistor;

wherein the driver comprises a clipper transistor having a drain coupled to the output node, and a control gate coupled to a driver voltage, Vdrv, and the clipper transistor is configured to clip the voltage of the output node; and

a pair of back-to-back inverters coupled to a source of the clipper transistor, wherein the pair of back-to-back inverters is configured to hold a voltage of the source of the clipper transistor at Vdrv when Vx>Vdrv−Vth, where Vth is a threshold voltage of the clipper transistor, to turn off the clipper transistor.

2 . The apparatus of claim 1 , wherein the voltage of the source of the clipper transistor is configured to turn on the clipper transistor when Vx<Vdrv−Vth.

3 . The apparatus of claim 1 , wherein the driver further comprises:

a zero-voltage switching circuit coupled to the clipper transistor;

a delay circuit coupled to the zero-voltage switching circuit; and

a driver stage coupled to the zero-voltage switching circuit and the delay circuit, wherein an output of the driver stage is coupled to the control gate of the low-side transistor.

4 . The apparatus of claim 3 , wherein the driver further comprises a transistor configured to ground the source of the clipper transistor to disable the zero-voltage switching circuit.

5 . The apparatus of claim 3 , wherein the zero-voltage switching circuit comprises a transmission gate having an input coupled to the source of the clipper transistor and an output coupled to the driver stage.

6 . The apparatus of claim 5 , wherein the transmission gate comprises an nMOS transistor and a pMOS transistor, the nMOS transistor is to receive a drive signal, and the pMOS transistor is to receive a signal opposite in polarity to the drive signal.

7 . The apparatus of claim 1 , wherein the high-side transistor and the low-side transistor are Gallium Nitride-based and the driver is CMOS-based.

8 . The apparatus of claim 1 , wherein the high-side transistor and the low-side transistor are non-CMOS based and the driver is CMOS-based.

9 . The apparatus of claim 1 , wherein the driver is configured to ensure that the voltage of the output node has decreased below a specified level before turning on the low-side transistor.

10 . A driver, comprising:

a clipper transistor comprising a drain to receive a voltage Vx of an output node of a power stage, a source, and a control gate coupled to a driver voltage, Vdrv;

a restore circuit coupled to the source of the clipper transistor;

a zero-voltage switching circuit coupled to the source of the clipper transistor, wherein the restore circuit and the zero-voltage switching circuit are configured to hold a voltage of the source of the clipper transistor at Vdrv when Vx>Vdrv−Vth, where Vth is a threshold voltage of the clipper transistor; and

a driver stage coupled to the zero-voltage switching circuit, wherein the driver stage is configured to provide a voltage to a low-side transistor of the power stage.

11 . The driver of claim 10 , wherein:

the output node is between a high-side transistor and the low-side transistor of the power stage; and

the voltage provided to the power stage comprises a control gate voltage for the low-side transistor.

12 . The driver of claim 11 , wherein:

the driver stage is configured to ensure that the voltage of the output node has decreased below a specified level before turning on the low-side transistor.

13 . The driver of claim 10 , wherein the driver is on silicon substrate or layer and the power stage is on Gallium Arsenide layer or substrate.

14 . An apparatus, comprising:

a high-side transistor and a low-side transistor;

an output node coupled between the high-side transistor and the low-side transistor;

and a driver comprising an output coupled to a control gate of the low-side transistor,

wherein the driver further comprises a clipper transistor comprising a drain coupled to the output node to receive a voltage Vx of the output node, a source, and a control gate coupled to a driver voltage, wherein the driver is configured to turn on the low-side transistor in response to detecting that a voltage Vxsen of the source of the clipper transistor has decreased below a threshold voltage Vth of the clipper transistor.

15 . The apparatus of claim 14 , wherein the high-side transistor and the low-side transistor are on a Gallium Arsenide substrate or layer and the driver is on a silicon substrate or layer.

16 . The apparatus of claim 14 , wherein the high-side transistor and the low-side transistor are not based on a complementary metal-oxide semiconductor (CMOS) and the driver is based on a CMOS.

17 . The driver of claim 10 , wherein the restore circuit comprises a pair of back-to-back inverters coupled to the source of the clipper transistor.

18 . The driver of claim 10 , wherein the clipper transistor is configured to turn off when the voltage of the source is held at Vdrv and Vx>Vdrv−Vth.

19 . The driver of claim 11 , wherein the driver stage comprises a p-type transistor in series with an n-type transistor, and a node between p-type transistor and the n-type transistor is coupled to a control gate of the low-side transistor of the power stage.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 25, 2022
From: AMIN, SALLY SAFWAT
To: INTEL CORPORATION
Reel/Frame 060905/0506 →
Continuity (1)
Related Publication 20240072662A1 · Feb 29, 2024
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