Open block relocation
Aspects of a storage device including a memory and a controller are provided. In certain aspects, the controller may determine that data stored on a first block satisfies a threshold data-error condition, the data comprising invalid data and valid data. For example, the first block may have a high ratio of valid data to invalid data that satisfies or exceeds a threshold value. In certain aspects, the controller may determine a close block boundary associated with the first block, wherein the close block boundary is configured to bifurcate the first block into a first portion and a second portion, wherein the first portion comprises the data. For example, the controller may determine a boundary defined by a data length, an indirection mapping unit, a physical program boundary, etc.
1. A storage device, comprising:
a memory; and
a controller coupled to the memory and configured to:
determine that data stored on a first block satisfies a threshold data-error condition, the data comprising invalid data and valid data;
determine a close block boundary associated with the first block, wherein the close block boundary is configured to bifurcate the first block into a first portion and a second portion, wherein the first portion comprises the data; and
write generated data to the first portion of the first block, wherein the generated data fills the first portion of the first block to the close block boundary.
2. The storage device of claim 1 , wherein the close block boundary is defined by a data length associated with an error detection function.
3. The storage device of claim 2 , wherein the error detection function is an error correction code (ECC), a low-density parity-check code (LDPC), or an XOR function.
4. The storage device of claim 1 , wherein the close block boundary is defined by an indirection mapping unit.
5. The storage device of claim 1 , wherein the close block boundary is defined by a physical boundary of the memory.
6. The storage device of claim 5 , wherein the physical boundary of the memory is defined by one or more of a single-level cell (SLC) or multi-level cell (MLC) physical program boundary, or a triple-level cell (TLC) or quad-level cell (QLC) NAND layer.
7. The storage device of claim 1 , wherein the controller is further configured to:
close the first block after writing the generated data to the first portion;
open a second block in response to closure of the first block; and
relocate the valid data from the first portion of the first block to the second block.
8. The storage device of claim 7 , wherein the controller is further configured to:
erase the first block in response to the relocation of the valid data.
9. The storage device of claim 1 , wherein the generated data is dummy data.
10. The storage device of claim 1 , wherein the data error condition is a block error rate (BER) of data stored on the first block.
11. The storage device of claim 1 , wherein the threshold data-error condition is a ratio of valid data to invalid data.
12. A method for open block data relocation in a memory, comprising:
determining that data stored on a first block satisfies a threshold data-error condition, the data comprising invalid data and valid data;
determining a close block boundary associated with the first block, wherein the close block boundary is configured to bifurcate the first block into a first portion and a second portion, wherein the first portion comprises the data; and
writing generated data to the first portion of the first block, wherein the generated data fills the first portion of the first block to the close block boundary.
13. The method of claim 12 , wherein the close block boundary is defined by a data length associated with an error detection function.
14. The method of claim 13 , wherein the error detection function is an error correction code (ECC), a low-density parity-check code (LDPC), or an XOR function.
15. The method of claim 12 , wherein the close block boundary is defined by an indirection mapping unit.
16. The method of claim 12 , wherein the close block boundary is defined by a physical boundary of the memory.
17. The method of claim 16 , wherein the physical boundary of the memory is defined by one or more of a single-level cell (SLC) or multi-level cell (MLC) physical program boundary, or a triple-level cell (TLC) or quad-level cell (QLC) NAND layer.
18. The method of claim 12 , wherein the method further comprises:
closing the first block after writing the generated data to the first portion;
opening a second block in response to closure of the first block; and
relocating the valid data from the first portion of the first block to the second block.
19. The method of claim 18 , wherein the method further comprised:
erasing the first block in response to the relocation of the valid data.
20. A storage device, comprising:
a memory; and
a controller coupled to the memory and configured to:
close a first block based on a satisfies a threshold data-error condition of the first block, wherein the first block comprises invalid data and valid data;
open a second block in response to closing the first block; and
relocate the valid data from the first block to the second block.