Address translation for zoned namespace nonvolatile memory using a compacted logical-to-physical table
A Zoned Namespace data storage device configured to perform logical-to-physical (L2P) address translation using a compacted L2P having an erase-block granularity. For a host logical address, the compacted L2P table only has the physical address of the corresponding erase block, which provides a first part of the pertinent physical address. A controller of the data storage device calculates a second part of the pertinent physical address based on the superblock layout employed in the device and further based on the sequential write requirement to the superblocks. The controller then obtains the full physical address corresponding to the host logical address by combining the first and second parts. The erase-block granularity of the compacted L2P table enables the full L2P table of the device to have a relatively small size, which can beneficially be used to make more space available in the same amount of RAM for other operations.
1. A data storage device, comprising:
a nonvolatile memory having a plurality of superblocks mapped to a plurality of zones, each of the plurality of zones being of a type requiring sequential write of host data, an erase block being a minimum erasable unit of the plurality of superblocks; and
a controller coupled to the nonvolatile memory and configured to perform logical-to-physical (L2P) address translation using a compacted L2P table having an erase-block granularity; and
wherein, for a logical address of a zone of the plurality of zones, the controller is configured to obtain a corresponding physical address by:
retrieving a physical address of a corresponding erase block from the compacted L2P table based on the logical address;
calculating a corresponding word-line number, a corresponding string-line number, a corresponding page-type identifier, and a corresponding page offset based on the logical address; and
combining the retrieved physical address with the corresponding word-line number, the corresponding string-line number, the corresponding page-type identifier, and the corresponding page offset that are calculated to obtain the corresponding physical address.
2. The data storage device of claim 1 , wherein the controller is further configured to:
calculate an erase-block number corresponding to the logical address of the zone; and
look up the physical address of the corresponding erase block in the compacted L2P table using the erase-block number that is calculated.
3. The data storage device of claim 1 , wherein the controller is configured to calculate the corresponding word-line number (WL num) based on a mathematical relationship expressed as:
WL num=((HLBA− O 1 )/( N 1 ×N 3 ×N 4 ))/ N 5
where HLBA is the logical address; N 1 is a number of erase blocks in a superblock of the plurality of superblocks; N 3 is a number of page types; N 4 is a number of pages per page type; N 5 is a number of string lines per word line; and O 1 is a fixed offset.
4. The data storage device of claim 1 , wherein the controller is configured to calculate the corresponding string-line number (SL num) based on a mathematical relationship expressed as:
SL num=((HLBA− O 1 )/( N 1 ×N 3 ×N 4 ))mod N 5
where HLBA is the logical address; N 1 is a number of erase blocks in a superblock of the plurality of superblocks; N 3 is a number of page types; N 4 is a number of pages per page type; N 5 is a number of string lines per word line; and O 1 is a fixed offset.
5. The data storage device of claim 1 , wherein the controller is configured to calculate the corresponding page-type identifier (Page type ID) based on a mathematical relationship expressed as:
Page type ID=((HLBA− O 1 )/( N 3 ×N 4 ))mod N 3
where HLBA is the logical address; N 3 is a number of page types; N 4 is a number of pages per page type; and O 1 is a fixed offset.
6. The data storage device of claim 1 , wherein the controller is configured to calculate the corresponding page offset (PO) based on a mathematical relationship expressed as:
PO=(HLBA− O 1 )mod N 4
where HLBA is the logical address; N 4 is a number of pages per page type; and O 1 is a fixed offset.
7. The data storage device of claim 1 ,
wherein a page is a minimum writable unit of the plurality of superblocks;
wherein each of the plurality of superblocks includes a first fixed number of erase blocks;
wherein each of the first fixed number of the erase blocks includes a second fixed number of string-line blocks;
wherein each of the second fixed number of the string-line blocks includes a third fixed number of page types; and
wherein each of the third fixed number of the page types includes a fourth fixed number of pages.
8. The data storage device of claim 1 ,
wherein the zone is a full zone; and
wherein the compacted L2P table is stored in a control-data partition of the nonvolatile memory.
9. An address-translation method for a data storage device, the method comprising:
mapping a plurality of superblocks of a nonvolatile memory of the data storage device to a plurality of zones, each of the plurality of zones being of a type requiring sequential write of host data, an erase block being a minimum erasable unit of the plurality of superblocks;
performing logical-to-physical (L2P) address translation using a controller coupled to the nonvolatile memory and further using a compacted L2P table having an erase-block granularity; and
obtaining, via the controller, a corresponding physical address for a logical address of a zone of the plurality of zones by:
retrieving a physical address of a corresponding erase block from the compacted L2P table based on the logical address;
calculating a corresponding word-line number, a corresponding string-line number, a corresponding page-type identifier, and a corresponding page offset based on the logical address; and
combining the physical address that is retrieved with the corresponding word-line number, the corresponding string-line number, the corresponding page-type identifier, and the corresponding page offset that are calculated.
10. The method of claim 9 , further comprising
calculating, via the controller, an erase-block number corresponding to the logical address of the zone; and
looking up, via the controller, the physical address of the corresponding erase block in the compacted L2P table using the erase-block number that is calculated.
11. The method of claim 9 , wherein the calculating comprises calculating the corresponding word-line number (WL num) based on a mathematical relationship expressed as:
WL num=((HLBA− O 1 )/( N 1 ×N 3 ×N 4 ))/ N 5
where HLBA is the logical address; N 1 is a number of erase blocks in a superblock of the plurality of superblocks; N 3 is a number of page types; N 4 is a number of pages per page type; N 5 is a number of string lines per word line; and O 1 is a fixed offset.
12. The method of claim 9 , wherein the calculating comprises calculating the corresponding string-line number (SL num) based on a mathematical relationship expressed as:
SL num=((HLBA− O 1 )/( N 1 ×N 3 ×N 4 ))mod N 5
where HLBA is the logical address; N 1 is a number of erase blocks in a superblock of the plurality of superblocks; N 3 is a number of page types; N 4 is a number of pages per page type; N 5 is a number of string lines per word line; and O 1 is a fixed offset.
13. The method of claim 9 , wherein the calculating comprises calculating the corresponding page-type identifier (Page type ID) based on a mathematical relationship expressed as:
Page type ID=((HLBA− O 1 )/( N 3 ×N 4 ))mod N 3
where HLBA is the logical address; N 3 is a number of page types; N 4 is a number of pages per page type; and O 1 is a fixed offset.
14. The method of claim 9 , wherein the calculating comprises calculating the corresponding page offset (PO) based on a mathematical relationship expressed as:
PO=(HLBA− O 1 )mod N 4
where HLBA is the logical address; N 4 is a number of pages per page type; and O 1 is a fixed offset.
15. The method of claim 9 ,
wherein a page is a minimum writable unit of the plurality of superblocks;
wherein each of the plurality of superblocks includes a first fixed number of erase blocks;
wherein each of the first fixed number of the erase blocks includes a second fixed number of string-line blocks;
wherein each of the second fixed number of the string-line blocks includes a third fixed number of page types; and
wherein each of the third fixed number of the page types includes a fourth fixed number of pages.
16. The method of claim 9 ,
wherein the zone is a full zone; and
wherein the compacted L2P table is stored in a control-data partition of the nonvolatile memory.
17. An apparatus, comprising:
means for mapping a plurality of superblocks of a nonvolatile memory to a plurality of zones, each of the plurality of zones being of a type requiring sequential write of host data therein, an erase block being a minimum erasable unit of the plurality of superblocks;
means for performing logical-to-physical (L2P) address translation using a compacted L2P table having an erase-block granularity; and
means for obtaining a corresponding physical address for a logical address of a zone of the plurality of zones, the means for obtaining including:
means for retrieving a physical address of a corresponding erase block from the compacted L2P table;
means for calculating a corresponding word-line number, a corresponding string-line number, a corresponding page-type identifier, and a corresponding page offset based on the logical address; and
means for combining the physical address that is retrieved with the corresponding word-line number, the corresponding string-line number, the corresponding page-type identifier, and the corresponding page offset.
18. The apparatus of claim 17 , further comprising:
means for calculating an erase-block number corresponding to the logical address of the zone; and
means for looking up the physical address of the corresponding erase block in the compacted L2P table using the erase-block number that is calculated.
19. The apparatus of claim 17 ,
wherein a page is a minimum writable unit of the plurality of superblocks;
wherein each of the plurality of superblocks includes a first fixed number of erase blocks;
wherein each of the first fixed number of the erase blocks includes a second fixed number of string-line blocks;
wherein each of the second fixed number of the string-line blocks includes a third fixed number of page types; and
wherein each of the third fixed number of the page types includes a fourth fixed number of pages.
20. The apparatus of claim 17 ,
wherein the zone is in a full state; and
wherein the compacted L2P table is stored in a control-data partition of the nonvolatile memory.