IP Library Granted Patent US 12,501,791
Granted Patent B2
US 12,501,791 · App. 17/905,670 · Granted Dec 16, 2025

Array substrate and display apparatus

Inventors: Hong Yi (Beijing, CN); Mengqi Wang (Beijing, CN); Wenbo Chen (Beijing, CN)
Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd.; Beijing BOE Technology Development Co., Ltd.
H10K59/131H10K2102/311
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Quick Facts
Patent No.
US 12,501,791
App. No.
17/905,670
Granted
Dec 16, 2025
Kind
B2
Abstract

An array substrate is provided, comprising a plurality of signal lines; wherein a respective signal line of the plurality of signal lines comprises a first portion in a first area and a second portion in a second area, the first portion and the second portion being in different layers; second portions of the plurality of signal lines are grouped into a plurality of pairs, a respective pair comprising a first-second portion and a second-second portion of two adjacent signal lines of the plurality of signal lines; and an orthographic projection of the first-second portion on a base substrate and an orthographic projection of the second-second portion on the base substrate at least partially overlap with each other.

Claims (40)

1 . An array substrate, comprising a display area, a bending area, and a fanout area between the display area and the bending area, and a plurality of signal lines;

wherein a respective signal line of the plurality of signal lines comprises a first portion in a first area and a second portion in a second area, the first portion and the second portion being in different layers;

the first area is at least partially in the fanout area;

the second area is at least partially in the bending area;

orthographic projections of first portions in the fanout area of adjacent signal lines of the plurality of signal lines on a base substrate are non-overlapping with each other;

second portions of the plurality of signal lines are grouped into a plurality of pairs, a respective pair comprising a first-second portion and a second-second portion of two adjacent signal lines of the plurality of signal lines;

the first-second portion and a second-second portion in the bending area are in different layers; and

orthographic projections of the first-second portion and the second-second portion on the base substrate at least partially overlap with each other.

2 . The array substrate of claim 1 , wherein at least two first portions of the plurality of signal lines are in two different layers.

3 . The array substrate of claim 2 , wherein first portions of the plurality of signal lines are alternately in a first metal layer and a second metal layer.

4 . The array substrate of claim 1 , wherein the respective signal line of the plurality of signal lines further comprises a third portion between the first portion and the second portion, and in a third area; and

the third portion comprises a first sub-layer connected to, in a same layer as, the first portion, and a second sub-layer connected to, in a same layer as, the second portion.

5 . The array substrate of claim 4 , wherein the second sub-layer is connected to the first sub-layer through a via extending through an insulating layer.

6 . The array substrate of claim 4 , wherein orthographic projections of adjacent third portions on the base substrate are at least partially non-overlapping.

7 . The array substrate of claim 4 , wherein second sub-layers of third portions of the plurality of signal lines are alternately in a first signal line layer and a second signal line layer.

8 . The array substrate of claim 4 , wherein at least two first sub-layers of third portions of the plurality of signal lines are in two different layers.

9 . The array substrate of claim 8 , wherein first sub-layers of third portions of the plurality of signal lines are alternately in a first metal layer and a second metal layer.

10 . The array substrate of claim 1 , comprising a plurality of junction structures;

wherein a respective junction structure comprises:

the first-second portion;

the second-second portion;

a first-first sub-layer of a first-third portion;

a first-second sub-layer of the first-third portion connected to, in a same layer as, the first-second portion;

a second-first sub-layer of a second-third portion; and

a second-second sub-layer of the second-third portion connected to, in a same layer as, the second-second portion.

11 . The array substrate of claim 10 , wherein the first-first sub-layer, the first-second sub-layer, the second-first sub-layer, and the second-second sub-layer are in four different layers, respectively.

12 . The array substrate of claim 11 , wherein the first-first sub-layer and the second-first sub-layer are in two different layers selected from a first metal layer and a second metal layer; and

the first-second sub-layer and the second-second sub-layer are in two different layers selected from a first signal line layer and a second signal line layer.

13 . The array substrate of claim 10 , wherein the first-first sub-layer is connected to, in a same layer as, a first-first portion;

the second-first sub-layer is connected to, in a same layer as, a second-first portion; and

the first-first portion and the second-first portion are two adjacent first portions of the two adjacent signal lines.

14 . The array substrate of claim 1 , wherein the respective signal line of the plurality of signal lines further comprises a fourth portion in a fourth area;

the fourth portion is electrically connected to a signal line in a display area;

the fourth portion is connected to, in a same layer as, the first portion; and

extension directions of the fourth portion and the first portion are different.

15 . The array substrate of claim 14 , wherein at least two fourth portions of the plurality of signal lines are in two different layers.

16 . The array substrate of claim 15 , wherein fourth portions of the plurality of signal lines are alternately in a first metal layer and a second metal layer.

17 . The array substrate of claim 14 , wherein orthographic projections of two adjacent fourth portions are partially overlapping with each other.

18 . The array substrate of claim 14 , wherein extension direction of the first portion and the second portion are substantially the same.

19 . A display apparatus, comprising the array substrate of claim 1 , and an integrated circuit connected to the array substrate.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2025
From: BOE TECHNOLOGY GROUP CO., LTD.
To: BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
Reel/Frame 072866/0486 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2022
From: YI, HONG; WANG, MENGQI; CHEN, WENBO
To: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.; BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 060995/0431 →
Continuity (1)
Related Publication 20240206250A1 · Jun 20, 2024
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