IP Library Granted Patent US 12,501,545
Granted Patent B2
US 12,501,545 · App. 17/920,495 · Granted Dec 16, 2025

Circuit board

Inventors: Se Woong Na (Seoul, KR); Jung Eun Han (Seoul, KR)
Assignee: LG INNOTEK CO., LTD.
C12N15/86A61K48/005A61K48/0058A61K48/0066H05K1/0296H05K1/03C12N2750/14133C12N2750/14143C12N2830/008H05K2201/2081
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Quick Facts
Patent No.
US 12,501,545
App. No.
17/920,495
Granted
Dec 16, 2025
Kind
B2
Abstract

A printed circuit board according to an embodiment comprises: an insulating layer; a circuit pattern disposed on the upper surface of the insulating layer; a support layer which is disposed on the upper surface of the insulating layer to expose the upper surface of the circuit pattern and is in contact with the sides of the circuit pattern; and a protective layer disposed on the upper surfaces of the support layer and the circuit pattern, wherein the upper region of the insulating layer comprises a first region and a second region, and the protective layer comprises an open region exposing the upper surfaces of the support layer and the circuit pattern that are disposed in the first region, and the support layer comprises a first upper surface positioned at the highest level among the upper surfaces of the support layer and a second upper surface positioned at the lowest level among the upper surfaces of the support layer, the second upper surface being lower than the first upper surface, and the protective layer comprises a first portion which contacts the upper surface of the circuit pattern of the first region and a second portion which contacts the upper surface of the support layer of the first region, and the second portion of the protective layer contacts the second upper surface of the support layer and includes a first lower surface which is lower than the upper surface of the circuit pattern.

Claims (33)

1 . A circuit board comprising:

a build-up insulating layer including a plurality of first insulating layers laminated along a vertical direction;

a second insulating layer disposed on the build-up insulating layer;

a circuit pattern disposed on the build-up insulating layer and passing through the second insulating layer; and

a third insulating layer disposed on the second insulating layer,

wherein an upper surface of the second insulating layer includes a concave portion concave with respect to the build-up insulating layer, and

wherein a lower surface of the third insulating layer includes a convex portion in contact with the upper surface of the second insulating layer and convex with respect to the build-up insulating layer.

2 . The circuit board of claim 1 ,

wherein the second insulating layer does not vertically overlap the circuit pattern.

3 . The circuit board of claim 2 , wherein the third insulating layer is respectively disposed on the second insulating layer and the circuit pattern,

the convex portion of the third insulating layer is in contact with the concave portion of the second insulating layer, and

the third insulating layer further includes a flat portion extended from the convex portion in a horizontal direction and in contact with the circuit pattern.

4 . The circuit board of claim 1 , wherein the second insulating layer includes an insulating material different from that of the third insulating layer.

5 . The circuit board of claim 4 , wherein

the second insulating layer includes at least one of an ajinomoto build-up film (ABF), resin coated copper (RCC), or a photo imageable dielectric resin (PID), and

the third insulating layer includes a solder resist.

6 . The circuit board of claim 1 , wherein the second insulating layer is provided to surround a side surface of the circuit pattern without contacting an upper surface of the circuit pattern.

7 . The circuit board of claim 6 , wherein a highest portion of the concave portion of the second insulating layer is positioned lower than the upper surface of the circuit pattern.

8 . The circuit board of claim 1 , wherein a height of the concave portion of the second insulating layer is lowered as it goes away from the side surface of the circuit pattern.

9 . The circuit board of claim 1 , wherein at least a part of the convex portion of the third insulating layer is positioned lower than an upper surface of the circuit pattern.

10 . The circuit board of claim 9 , wherein a vertical distance from a lowest portion of the convex portion of the third insulating layer to the upper surface of the circuit pattern satisfies a range of 20% to 50% of a vertical distance from the upper surface of the circuit pattern to a lower surface of the circuit pattern.

11 . The circuit board of claim 1 , wherein a vertical distance from a lower surface of the second insulating layer to a lowest portion of the concave portion of the second insulating layer satisfies a range of 50% to 90% of a vertical distance from an upper surface of the circuit pattern to a lower surface of the circuit pattern.

12 . The circuit board of claim 1 , wherein a vertical distance from a lower surface of the second insulating layer to a highest portion of the concave portion of the second insulating layer satisfies a range of 90% to 100% of a vertical distance from an upper surface of the circuit pattern to a lower surface of the circuit pattern.

13 . The circuit board of claim 1 , wherein a vertical distance from a highest portion of the concave portion to a lowest portion of the concave portion of the second insulating layer satisfies a range of 10% to 20% of a vertical distance from an upper surface of the circuit pattern to a lower surface of the circuit pattern.

14 . The circuit board of claim 1 , wherein a highest portion of the concave portion of the second insulating layer is closer to the circuit pattern than a lowest portion of the concave portion of the second insulating layer.

15 . The circuit board of claim 14 , wherein a highest portion of the convex portion of the third insulating layer is closer to the circuit pattern than a lowest portion of the convex portion of the second insulating layer.

16 . The circuit board of claim 1 , wherein the third insulating layer includes an opening configured to vertically overlap at least a part of the circuit pattern and at least a part of the second insulating layer.

17 . The circuit board of claim 1 , wherein the circuit pattern includes a plurality of patterns spaced apart from each other along the horizontal direction.

18 . The circuit board of claim 17 , wherein at least a part of the circuit pattern is disposed on the uppermost insulating layer.

19 . The circuit board of claim 17 , further comprising a fourth insulating layer disposed between the uppermost insulating layer and the second insulating layer,

wherein the circuit pattern and the second insulating layer are disposed on the fourth insulating layer.

20 . The circuit board of claim 17 , wherein

the convex portion is positioned between the plurality of patterns and overlaps the plurality of patterns along the horizontal direction.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 21, 2022
From: NA, SE WOONG; HAN, JUNG EUN
To: LG INNOTEK CO., LTD.
Reel/Frame 061494/0449 →
Priority Claims (1)
KR 10-2020-0049578 · Apr 23, 2020 · national
Continuity (1)
Related Publication 20230171886A1 · Jun 1, 2023
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Cited By (1)
US 12,672,228