Wiring structure, method for manufacturing same, and semiconductor package
Disclosed is a method for manufacturing a wiring structure including a step of forming a wiring on an insulating resin layer. The step of forming the wiring includes: forming a modified region including pores in a surface layer of the insulating resin layer by treating a surface of the insulating resin layer with a treatment method including surface modification; forming a seed layer on the surface of the insulating resin layer by sputtering; and forming the wiring on the seed layer by electrolytic copper plating.
1. A wiring structure, comprising: an insulating resin layer; a seed layer provided on the insulating resin layer and including one or more metal layers; and a copper wiring provided on the seed layer, wherein a modified region including pores is formed in a surface layer of the insulating resin layer on the seed layer side, and a part of metal forming the seed layer penetrates into the pores, and wherein the surface of the insulating resin layer including the modified region has a surface roughness Ra of 70 nm or less.
2. The wiring structure according to claim 1 , wherein the seed layer includes: an adhesion layer in contact with the insulating resin layer; and a power supply layer formed on the adhesion layer, the adhesion layer is a metal layer containing titanium, chromium, tungsten, nickel, or a combination thereof, and the power supply layer is a metal layer containing copper.
3. The wiring structure according to claim 1 , wherein a depth of the modified region is 50 nm or more.
4. The wiring structure according to claim 1 , wherein the wiring includes a linear portion having a width of 1 to 10 μm.
5. A semiconductor package, comprising: the wiring structure according to claim 1 ; and a semiconductor chip connected to the wiring of the wiring structure.
6. A wiring structure, comprising: an insulating resin layer; a seed layer provided on the insulating resin layer and including one or more metal layers; and a copper wiring provided on the seed layer, wherein a modified region including pores is formed in a surface layer of the insulating resin layer on the seed layer side, and a part of metal forming the seed layer penetrates into the pores, and wherein a depth of the modified region is 50 nm or more and 200 nm or less.
7. The wiring structure according to claim 6 , wherein the seed layer includes: an adhesion layer in contact with the insulating resin layer; and a power supply layer formed on the adhesion layer, the adhesion layer is a metal layer containing titanium, chromium, tungsten, nickel, or a combination thereof, and the power supply layer is a metal layer containing copper.
8. The wiring structure according to claim 6 , wherein the wiring includes a linear portion having a width of 1 to 10 μm.
9. A semiconductor package, comprising: the wiring structure according to claim 6 ; and a semiconductor chip connected to the wiring of the wiring structure.