IP Library Granted Patent US 12,229,403
Granted Patent B2
US 12,229,403 · App. 17/933,720 · Granted Feb 18, 2025

Hybrid logical to physical mapping for ZNS based SSDs

Inventors: Chaitanya Kavirayani (Karnataka, IN); Vineet Agarwal (Karnataka, IN); Sampath Raja Murthy (Karnataka, IN); Aakar Deora (Karnataka, IN); Varun Singh (Delhi, IN)
Assignee: SANDISK TECHNOLOGIES, INC.
G06F3/0604G06F3/0656G06F3/0659G06F3/0679G06F12/0246G06F2212/7201
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Quick Facts
Patent No.
US 12,229,403
App. No.
17/933,720
Granted
Feb 18, 2025
Kind
B2
Abstract

Aspects of a storage device are provided that handle host commands associated with active and inactive zones using a hybrid L2P mapping system. The storage device includes a NVM, a controller, a first volatile memory and a second volatile memory. The controller allocates, as a superblock, one or more physical blocks respectively in one or more memory dies of the NVM, receives write commands including logical addresses associated with active zones, and stores in an L2P mapping table L2P address mappings of these logical addresses to physical addresses associated with either volatile memory or the superblock. The controller refrains from storing L2P address mappings for inactive zones, instead storing in a superblock mapping table a mapping of superblocks to inactive zones in response to respective zone finish commands. As a result, L2P mapping table sizes are reduced, zone read, reset, and TTR performance are increased, and reduced WAF is achieved.

Claims (88)

1. A storage device, comprising:

a non-volatile memory;

a first volatile memory and a second volatile memory; and

a controller configured to:

receive a write command including a logical address associated with a zone, the zone including a range of logical addresses;

store, in a logical-to-physical (L2P) mapping table in the first volatile memory or the second volatile memory, a L2P address mapping of the logical address associated with the zone to a physical address associated with the first volatile memory or the non-volatile memory, the L2P address mapping being stored in response to the zone being an active zone; and

refrain from storing L2P address mappings for inactive zones in the L2P mapping table such that L2P address mappings for sequential data including logical page indices (LPIs) are maintained in the L2P mapping table for only active zones.

2. The storage device of claim 1 , wherein the L2P mapping table includes a plurality of logical regions including a range of logical page offsets, each of the logical regions being associated with a respective active zone.

3. The storage device of claim 2 , wherein the logical address is a logical page index (LPI), and to store the L2P address mapping in the L2P mapping table, the controller is further configured to:

determine a zone identifier associated with the zone from the LPI, an active zone index associated with the zone from the zone identifier, and a logical page offset relative to the active zone index; and

store the L2P address mapping in an L2P mapping table entry associated with the logical page offset relative to the active zone index.

4. The storage device of claim 1 , wherein the non-volatile memory comprises a plurality of physical blocks respectively in a plurality of non-volatile memory dies, and

wherein the controller is further configured to:

allocate, as a superblock, one or more of the physical blocks; and

store in a superblock mapping table in the first volatile memory or the second volatile memory, a mapping of the superblock to one of the inactive zones.

5. The storage device of claim 4 , wherein the controller is further configured to:

receive a zone finish command indicating to deactivate the active zone; and

store an association of the superblock to the zone in the superblock mapping table in response to the zone finish command.

6. The storage device of claim 5 , wherein the controller is further configured to remove the L2P address mapping from the L2P mapping table in response to the zone finish command.

7. The storage device of claim 5 , wherein the controller is further configured to:

receive a zone reset command indicating to reset the zone;

remove the association in the superblock mapping table in response to the zone reset command; and

reset a valid page count associated with the superblock instantaneously in response to the zone reset command.

8. The storage device of claim 1 ,

wherein the active zone is a sequential zone, and the controller is further configured to:

store host data associated with the write command in the first volatile memory internal to the controller; and

write the host data from the first volatile memory to the non-volatile memory.

9. The storage device of claim 1 ,

wherein the zone is associated with a zone random write area (ZRWA), and the controller is further configured to:

store host data associated with the write command in the first volatile memory internal to the controller;

relocate the host data to a buffer in a buffer pool associated with the active zone in the second volatile memory external to the controller; and

write the host data from the buffer to the non-volatile memory in response to a commit operation for the host data.

10. The storage device of claim 9 , wherein a size of the buffer pool associated with the active zone is a same size as a ZRWA window size associated with the active zone.

11. The storage device of claim 9 , wherein the buffer is associated with a buffer index that is a function of a start commit offset for the commit operation, the logical address associated with the write command, and a previously committed logical address.

12. The storage device of claim 9 , wherein to store the L2P address mapping of the logical address associated with the zone to the physical address associated with the non-volatile memory, the controller is configured to:

store, in the L2P mapping table, a first mapping of the logical address to a first physical address associated with the first volatile memory internal to the controller;

update the first mapping in the L2P mapping table with a second mapping of the logical address to a second physical address associated with the buffer in the second volatile memory external to the controller; and

update the second mapping in the L2P mapping table with the L2P address mapping of the logical address to the physical address associated with the non-volatile memory.

13. The storage device of claim 1 , wherein the non-volatile memory comprises a plurality of physical blocks respectively in a plurality of non-volatile memory dies, and

wherein the controller is further configured to:

allocate, as a superblock, one or more of the physical blocks; and

write host data associated with the write command to the superblock according to a fixed order of logical page writes in the superblock.

14. The storage device of claim 1 , wherein the controller is further configured to:

receive a read command for host data stored at the physical address of the non-volatile memory, the read command including a logical page index (LPI) associated with the active zone;

determine a zone identifier associated with the active zone from the LPI;

determine the physical address associated with the non-volatile memory from the L2P mapping table in response to the zone identifier being associated with an active zone index; and

read the host data associated with the LPI from the physical address.

15. The storage device of claim 1 , the controller is further configured to:

receive a read command for host data stored at a second physical address of the non-volatile memory, the read command including a logical page index (LPI) associated with an inactive zone;

determine a zone identifier associated with the inactive zone from the LPI;

determine the second physical address of the non-volatile memory from a superblock mapping table in response to the zone identifier being unassociated with an active zone index, the superblock mapping table including an association of a superblock with the inactive zone; and

read the host data associated with the LPI from the second physical address.

16. A storage device, comprising:

a plurality of non-volatile memory dies, each of the non-volatile memory dies including a physical block;

a first volatile memory and a second volatile memory; and

a controller configured to:

allocate, as a superblock, one or more of the physical blocks;

store in a superblock mapping table in the first volatile memory or the second volatile memory, a mapping of the superblock to a zone, the zone including a range of logical addresses; and

refrain from storing logical-to-physical (L2P) address mappings for inactive zones in a L2P mapping table such that L2P address mappings for sequential data including logical page indices (LPIs) are maintained in the L2P mapping table for only active zones.

17. The storage device of claim 16 ,

wherein the controller is further configured to:

receive a write command including a logical address in the range of logical addresses associated with the zone, the zone initially being an active sequential zone;

store host data associated with the write command in the first volatile memory internal to the controller;

write the host data from the first volatile memory to the superblock; and

receive a zone finish command indicating to deactivate the active sequential zone into an inactive zone, wherein the mapping of the superblock to the zone is stored in the superblock mapping table in response to the zone finish command.

18. The storage device of claim 16 ,

wherein the controller is further configured to:

receive a write command including a logical address in the range of logical addresses associated with the zone, the zone initially being an active zone associated with a zone random write area (ZRWA);

store host data associated with the write command in the first volatile memory internal to the controller;

relocate the host data to a buffer in a buffer pool associated with the active zone in the second volatile memory external to the controller;

write the host data from the buffer to the superblock in response to a commit operation for the host data; and

receive a zone finish command indicating to deactivate the active zone into an inactive zone, wherein the mapping of the superblock to the zone is stored in the superblock mapping table in response to the zone finish command.

19. The storage device of claim 16 , wherein the controller is further configured to:

receive a write command including a logical address in the range of logical addresses associated with the zone, the zone initially being an active zone;

write host data associated with the write command to the superblock;

store, in a logical-to-physical (L2P) mapping table in the first volatile memory or the second volatile memory, a L2P address mapping of the logical address associated with the zone to a physical address associated with the superblock, the L2P address mapping being stored in response to the zone being an active zone;

receive a zone finish command indicating to deactivate the active zone into an inactive zone, wherein the mapping of the superblock to the zone is stored in the superblock mapping table in response to the zone finish command; and

remove the L2P address mapping from the L2P mapping table further in response to the zone finish command.

20. A storage device, comprising:

a plurality of non-volatile memory dies, each of the non-volatile memory dies including a physical block;

a first volatile memory and a second volatile memory; and

a controller configured to:

allocate, as a superblock, one or more of the physical blocks;

receive a write command including a logical address associated with a zone, the zone including a range of logical addresses;

store, in a logical-to-physical (L2P) mapping table in the first volatile memory or the second volatile memory, a L2P address mapping of the logical address associated with the zone to a physical address associated with the first volatile memory or the superblock, the L2P address mapping being stored in response to the zone being an active zone;

refrain from storing L2P address mappings for inactive zones in the L2P mapping table such that L2P address mappings for sequential data including logical page indices (LPIs) are maintained in the L2P mapping table for only active zones;

store in a superblock mapping table in the first volatile memory or the second volatile memory, a mapping of the superblock to the zone in response to a zone finish command indicating to deactivate the active zone into an inactive zone; and

remove the L2P address mapping from the L2P mapping table further in response to the zone finish command.

Assignments (8)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 12, 2023
From: KAVIRAYANI, CHAITANYA; AGARWAL, VINEET; RAJA MURTHY, SAMPATH; DEORA, AAKAR; SINGH, VARUN
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 062357/0562 →
Continuity (1)
Related Publication 20240094903A1 · Mar 21, 2024
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