Granted Patent B2

US 12,363,968 · App. 17/954,385 · Granted Jul 15, 2025

Inventors: Kenichi Kawaguchi (Ebina, JP); Tsuyoshi Takahashi (Ebina, JP)

Assignee: Fujitsu Limited

H10D62/122H01L21/02546H01L21/02549H01L21/02603H01L21/0262H01L21/02642H10D8/053H10D8/75H10D62/824H10D84/05H10D84/221

Abstract

Claims (41)

1. A semiconductor device comprising:

a plurality of tunnel diodes, each of which includes a first semiconductor region of a first conductive type and a second semiconductor region of a second conductive type that is provided above the first semiconductor region, the second semiconductor region being a nanowire shape;

an insulating film provided around a side surface of the second semiconductor region;

a plurality of first electrodes, each coupled to the first semiconductor region; and

a plurality of second electrodes, each coupled to the second semiconductor region,

wherein the second electrode has a first surface that faces the side surface of the second semiconductor region across the insulating film, and

a diameter on an upper surface of a second semiconductor region of a first tunnel diode of the plurality of tunnel diodes is different from a diameter on an upper surface of a second semiconductor region of a second tunnel diode of the plurality of tunnel diodes.

2. The semiconductor device according to claim 1 , wherein a relationship of Expression (1) holds when it is assumed that a diameter on an upper surface of the second semiconductor region is d (cm) and a concentration of an impurity of a second conductive type included in the second semiconductor region is ρ (cm −3 ):

1.8×10 7 ≤d 2 ×ρ2×10 8   Expression (1).

3. The semiconductor device according to claim 1 , wherein the insulating film has a thickness of 10 nm or more and 30 nm or less.

4. The semiconductor device according to claim 1 , wherein a first part of the plurality of first electrodes is coupled to a second part of the plurality of first electrodes or one of the plurality of second electrodes.

5. The semiconductor device according to claim 1 , wherein a first part of the plurality of second electrodes is coupled to a second part of the plurality of second electrodes or one of the plurality of first electrodes.

6. The semiconductor device according to claim 1 , wherein a lower surface of the second electrode is above an interface between the first semiconductor region and the second semiconductor region.

7. The semiconductor device according to claim 1 , wherein the first semiconductor region has a nanowire shape.

8. The semiconductor device according to claim 1 , wherein concentrations of impurities of a second conductive type included in the second semiconductor region are equal among the plurality of tunnel diodes.

9. A reservoir computing system comprising:

an input circuit;

an output circuit; and

a reservoir circuit connected between the input circuit and the output circuit,

wherein the reservoir circuit includes the semiconductor device includes:

a plurality of tunnel diodes, each of which includes a first semiconductor region of a first conductive type and a second semiconductor region of a second conductive type that is provided above the first semiconductor region, the second semiconductor region being a nanowire shape;

an insulating film provided around a side surface of the second semiconductor region;

a plurality of first electrodes, each coupled to the first semiconductor region; and

a plurality of second electrodes, each coupled to the second semiconductor region,

wherein the second electrode has a first surface that faces the side surface of the second semiconductor region across the insulating film, and

a diameter on an upper surface of a second semiconductor region of a first tunnel diode of the plurality of tunnel diodes is different from a diameter on an upper surface of a second semiconductor region of a second tunnel diode of the plurality of tunnel diodes.

10. The reservoir computing system according to claim 9 , wherein

the reservoir circuit includes an analog memory, and

the reservoir computing system further comprising

a training data circuit that inputs teacher data to the analog memory.

11. A method for manufacturing a semiconductor device, comprising processing of:

forming a plurality of tunnel diodes, each of which includes a first semiconductor region of a first conductive type and a second semiconductor region of a second conductive type that is provided above the first semiconductor region and has a nanowire shape;

forming an insulating film around a side surface of the second semiconductor region;

forming a plurality of first electrodes, each coupled to the first semiconductor region; and

forming a plurality of second electrodes, each coupled to the second semiconductor region,

wherein the processing of forming the plurality of tunnel diodes includes processing of:

forming a growth mask that has a plurality of openings with different diameters above a substrate;

growing a plurality of the first semiconductor regions through the plurality of openings; and

growing the second semiconductor region on each of the first semiconductor regions,

the second electrode has a first surface that faces the side surface of the second semiconductor region across the insulating film, and

a diameter on an upper surface of a second semiconductor region of a first tunnel diode of the plurality of tunnel diodes is different from a diameter on an upper surface of a second semiconductor region of a second tunnel diode of the plurality of tunnel diodes.

Assignments (1)

Continuity (2)

References Cited (23)