Semiconductor device and method for fabricating the same
A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a spacer adjacent to the MTJ, a liner adjacent to the spacer, and a first metal interconnection on the MTJ. Preferably, the first metal interconnection includes protrusions adjacent to two sides of the MTJ and a bottom surface of the protrusions contact the liner directly.
1. A semiconductor device, comprising:
a magnetic tunneling junction (MTJ) on a substrate;
a spacer adjacent to the MTJ;
a liner adjacent to the spacer; and
a first metal interconnection on the MTJ, wherein the first metal interconnection comprises protrusions adjacent to two sides of the MTJ, a bottom surface of the protrusions contact the liner directly, and a width of the spacer directly contacting the protrusions is less than a width of the liner directly contacting the protrusions.
2. The semiconductor device of claim 1 , further comprising:
a first inter-metal dielectric (IMD) layer around the liner;
a second metal interconnection under the MTJ; and
a second IMD layer around the second metal interconnection.
3. The semiconductor device of claim 1 , wherein a top surface of the MTJ comprises a reverse V-shape.
4. The semiconductor device of claim 1 , wherein a bottom surface of the first metal interconnection comprises a reverse V-shape.
5. The semiconductor device of claim 1 , wherein a sidewall of the first metal interconnection is aligned with a sidewall of the liner.
6. The semiconductor device of claim 1 , wherein a bottom surface of the protrusions contact the spacer directly.
7. A semiconductor device, comprising:
a magnetic tunneling junction (MTJ) on a substrate;
a first liner adjacent to the MTJ;
a second liner on a top surface of the first liner; and
a first metal interconnection on the MTJ, wherein a sidewall of the first metal interconnection is aligned with a sidewall of the first liner.
8. The semiconductor device of claim 7 , further comprising:
a first inter-metal dielectric (1 MB) layer around the second liner;
a second metal interconnection under the MTJ; and
a second IMD layer around the second metal interconnection.
9. The semiconductor device of claim 8 , wherein a thickness of the first liner on a sidewall of the MTJ is less than the thickness of the first liner on a top surface of the second IMD layer.
10. The semiconductor device of claim 7 , wherein the first liner and the second liner are made of different materials.
11. The semiconductor device of claim 7 , wherein the first metal interconnection comprises protrusions adjacent to two sides of the MTJ and a bottom surface of the protrusions contact the first liner directly.
12. The semiconductor device of claim 7 , wherein a top surface of the MTJ comprises a reverse V-shape.
13. The semiconductor device of claim 7 , wherein a bottom surface of the first metal interconnection comprises a reverse V-shape.