Display apparatus having a first insulating layer including first portion and second portion
A display apparatus and a method of manufacturing the same are provided. The display apparatus includes a thin-film transistor including a semiconductor layer including a source region and a gate electrode overlapping the channel region, a lower electrode disposed under the semiconductor layer, a capacitor electrically connected to the thin-film transistor and including a first capacitor electrode and a second capacitor electrode over the first capacitor electrode, the first capacitor electrode being disposed on a same layer as the lower electrode, and a first insulating layer including a first portion and a second portion, the first portion being between the lower electrode and the semiconductor layer, and the second portion being between the first capacitor electrode and the second capacitor electrode, wherein a thickness of the second portion of the first insulating layer is less than a thickness of the first portion of the first insulating layer.
1 . A display apparatus comprising:
a thin-film transistor including a semiconductor layer and a gate electrode, wherein the semiconductor layer includes a channel region, a source region, and a drain region, the source region and the drain region disposed on two opposite sides of the channel region, and the gate electrode overlapping the channel region;
a lower electrode disposed under the semiconductor layer;
a capacitor electrically connected to the thin-film transistor and including a first capacitor electrode and a second capacitor electrode disposed over the first capacitor electrode, the first capacitor electrode disposed on a same layer as the lower electrode; and
a first insulating layer including a first portion and a second portion, the first portion disposed between the lower electrode and the semiconductor layer, and the second portion disposed between the first capacitor electrode and the second capacitor electrode,
wherein a thickness of the second portion of the first insulating layer is less than a thickness of the first portion of the first insulating layer.
2 . The display apparatus of claim 1 , wherein the first insulating layer includes a recess portion overlapping the first capacitor electrode, and at least a portion of the second capacitor electrode is located inside the recess portion.
3 . The display apparatus of claim 2 , further comprising a second insulating layer disposed on the first insulating layer,
wherein the second insulating layer includes a first portion disposed between the semiconductor layer and the gate electrode, and
wherein an opening defined in the second insulating layer overlaps the recess portion.
4 . The display apparatus of claim 3 , wherein a portion of the second insulating layer is located between a lower surface of the second capacitor electrode and an upper surface of the first insulating layer.
5 . The display apparatus of claim 2 , wherein the second portion of the first insulating layer is located below the recess portion.
6 . The display apparatus of claim 3 , wherein a lateral surface of the recess portion of the first insulating layer and a lateral surface of the opening of the second insulating layer are located on a same inclined surface.
7 . The display apparatus of claim 1 , wherein the second capacitor electrode includes a plurality of sub-layers, and
the gate electrode includes a plurality of sub-layers.
8 . The display apparatus of claim 7 , wherein a number of sub-layers of the second capacitor electrode is equal to a number of sub-layers of the gate electrode.
9 . The display apparatus of claim 1 , wherein the semiconductor layer includes an oxide semiconductor material.
10 . The display apparatus of claim 1 , further comprising:
an interlayer insulating layer covering the gate electrode and the second capacitor electrode;
a planarization layer covering the interlayer insulating layer; and
a display element disposed on the planarization layer and electrically connected to the thin-film transistor,
wherein the display element includes a sub-pixel electrode, an opposite electrode, and an emission layer which is disposed between the sub-pixel electrode and the opposite electrode, the opposite electrode disposed over the sub-pixel electrode.