IP Library › Granted Patent US 12,500,140
Granted Patent B2
US 12,500,140 · App. 17/976,069 · Granted Dec 16, 2025

Semiconductor device and method for manufacturing same

Inventor: Hideaki Takahashi (Omachi, JP)
Assignee: FUJI ELECTRIC CO., LTD.
H01L23/48H01L23/08H01R4/305H01R43/18H01R43/24
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Quick Facts
Patent No.
US 12,500,140
App. No.
17/976,069
Granted
Dec 16, 2025
Kind
B2
Abstract

A semiconductor device includes: a plate-shaped terminal including one main surface and another main surface and having one end electrically connected to a semiconductor chip; a nut arranged on the one main surface side at another end of the terminal; a nut cover provided on the one main surface side at the other end of the terminal and configured to cover the nut; and a case configured to surround the semiconductor chip and integrate the terminal and the nut cover, wherein the nut cover includes a protruding portion protruding from a lower portion of the nut cover to the one end side of the terminal.

Claims (33)

1 . A semiconductor device comprising:

a plate-shaped terminal including one main surface and another main surface and having one end electrically connected to a semiconductor chip and another end provided with a bolt insertion hole;

a nut arranged on the one main surface side at the other end of the terminal;

a nut cover provided on the one main surface side at the other end of the terminal and configured to cover the nut; and

a case configured to surround the semiconductor chip and integrate the terminal and the nut cover,

wherein the nut cover includes a covering portion covering the nut and a lateral protruding portion protruding laterally from the covering portion to the one end side of the terminal.

2 . The semiconductor device of claim 1 , wherein

the terminal includes:

an external connection portion corresponding to the other end;

a vertical portion connected to the external connection portion; and

an internal connection portion connected to the vertical portion and corresponding to the one end.

3 . The semiconductor device of 2 , wherein the protruding portion extends to a position facing the internal connection portion.

4 . The semiconductor device of claim 1 , wherein the terminal is provided in plurality in parallel, the nut cover being provided on each of the one main surface sides of the plurality of terminals.

5 . A method for manufacturing a semiconductor device comprising:

molding a nut cover including a covering portion formed with a hole for fitting a nut and a protruding portion protruding from the covering portion;

fitting the nut in the covering portion;

installing, in a mold, a plate-shaped terminal including one main surface and another main surface and having one end electrically connected to a semiconductor chip and another end provided with a bolt insertion hole;

arranging the nut cover in which the nut is fitted on the one main surface side at the other end of the terminal so that the protruding portion protrudes to the one end side of the terminal; and

molding a case configured to integrate the terminal and the nut cover.

6 . The semiconductor device of claim 2 , wherein

the covering portion has a first side surface facing the vertical portion, and

the lateral protruding portion protrudes from a lower portion of the first side surface.

7 . The semiconductor device of claim 6 , wherein

the covering portion has a second side surface on an opposite side of the first side surface, and

the second side surface is exposed from the case.

8 . The semiconductor device of claim 2 , wherein

the lateral protruding portion extends to a position below the internal connection portion.

9 . The semiconductor device of claim 2 , wherein

the lateral protruding portion has a portion overlapping the internal connection portion in a vertical direction.

10 . The semiconductor device of claim 2 , wherein

the case partially enters between an upper surface of the lateral protruding portion and the internal connection portion.

11 . The semiconductor device of claim 1 , wherein

a lower end of the covering portion is lower than the other end of the terminal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 28, 2022
From: TAKAHASHI, HIDEAKI
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 061581/0426 →
Priority Claims (1)
JP 2021-209663 · Dec 23, 2021 · national
Continuity (1)
Related Publication 20230207427A1 · Jun 29, 2023
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