IP Library Granted Patent US 11,791,219
Granted Patent B2
US 11,791,219 · App. 17/981,499 · Granted Oct 17, 2023

Semiconductor device and method for fabricating the same

Inventors: Fu-Jung Chuang (Kaohsiung, TW); Po-Jen Chuang (Kaohsiung, TW); Yu-Ren Wang (Tainan, TW); Chi-Mao Hsu (Tainan, TW); Chia-Ming Kuo (Kaohsiung, TW); Guan-Wei Huang (Tainan, TW); Chun-Hsien Lin (Tainan, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H01L21/823878H01L21/76224H01L21/823821H01L27/0924
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Quick Facts
Patent No.
US 11,791,219
App. No.
17/981,499
Granted
Oct 17, 2023
Kind
B2
Abstract

A method for fabricating semiconductor device includes the steps of first providing a substrate having a fin-shaped structure thereon, forming a single diffusion break (SDB) structure in the substrate to divide the fin-shaped structure into a first portion and a second portion, and then forming more than one gate structures such as a first gate structure and a second gate structure on the SDB structure. Preferably, each of the first gate structure and the second gate structure overlaps the fin-shaped structure and the SDB structure.

Claims (31)

1. A method for fabricating semiconductor device, comprising:

providing a substrate having a fin-shaped structure thereon;

forming a single diffusion break (SDB) structure in the substrate to divide the fin-shaped structure into a first portion and a second portion; and

forming a first gate structure and a second gate structure on the SDB structure, wherein a sidewall of the first gate structure is aligned with a sidewall of the SDB structure.

2. The method of claim 1 , further comprising:

forming a gate material layer on the SDB structure;

patterning the gate material layer to form the first gate structure and the second gate structure on the SDB structure;

forming a spacer around each of the first gate structure and the second gate structure;

forming a first source/drain region adjacent to the first gate structure and a second source/drain region adjacent to the second gate structure; and

performing a replacement metal gate (RMG) process to transform the first gate structure and the second gate structure into a first metal gate and a second metal gate.

3. The method of claim 2 , further comprising performing a sidewall image transfer (SIT) process for patterning the gate material layer.

4. The method of claim 1 , wherein the fin-shaped structure is disposed extending along a first direction and the SDB structure is disposed extending along a second direction.

5. The method of claim 4 , wherein the first direction is orthogonal to the second direction.

6. The method of claim 1 , wherein the SDB structure comprises silicon oxycarbonitride (SiOCN).

7. The method of claim 6 , wherein a concentration proportion of oxygen in SiOCN is between 30% to 60%.

8. A method for fabricating semiconductor device, comprising:

providing a substrate having a fin-shaped structure thereon;

forming a single diffusion break (SDB) structure in the substrate to divide the fin-shaped structure into a first portion and a second portion;

forming a first gate structure and a second gate structure on the SDB structure; and

forming a first spacer adjacent to the first gate structure and a second spacer adjacent to the second gate structure, wherein a sidewall of the first spacer is aligned with a sidewall of the SDB structure.

9. The method of claim 8 , further comprising:

forming a gate material layer on the SDB structure;

patterning the gate material layer to form the first gate structure and the second gate structure on the SDB structure;

forming the first spacer adjacent to the first gate structure and the second spacer adjacent to the second gate structure;

forming a first source/drain region adjacent to the first gate structure and a second source/drain region adjacent to the second gate structure; and

performing a replacement metal gate (RMG) process to transform the first gate structure and the second gate structure into a first metal gate and a second metal gate.

10. The method of claim 9 , further comprising performing a sidewall image transfer (SIT) process for patterning the gate material layer.

11. The method of claim 8 , wherein the fin-shaped structure is disposed extending along a first direction and the SDB structure is disposed extending along a second direction.

12. The method of claim 11 , wherein the first direction is orthogonal to the second direction.

13. The method of claim 8 , wherein the SDB structure comprises silicon oxycarbonitride (SiOCN).

14. The method of claim 13 , wherein a concentration proportion of oxygen in SiOCN is between 30% to 60%.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Jul 31, 2026
From: PNC BANK, NATIONAL ASSOCIATION
To: IMPERATIVE CHEMICAL PARTNERS, INC.
Reel/Frame 075491/0248 →
SECURITY INTEREST Recorded Feb 7, 2024
From: IMPERATIVE CHEMICAL PARTNERS, INC.
To: GLADSTONE BUSINESS LOAN, LLC
Reel/Frame 066406/0419 →
SUBMISSION UNDER MPEP 323.01(C)TO CORRECT ERRONEOUS RECORDATION OF ANOTHER PARTY'S ASSIGNMENT AGAINST PRESENT PATENT APPLICATION. SUBMISSION INCLUDES DECLARATION IDENTIFYING ERROR IN IMPROPERLY FILED AND RECORDED ASSIGNMENT. Recorded Sep 4, 2023
From: UNITED MICROELECTRONICS CORP.
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 064804/0024 →
SECURITY INTEREST Recorded Mar 2, 2023
From: IMPERATIVE CHEMICAL PARTNERS, INC.
To: PNC BANK, NATIONAL ASSOCIATION
Reel/Frame 062863/0009 →
Priority Claims (1)
TW 107120159 · Jun 12, 2018 · national
Continuity (5)
Continuation 17134465 · Dec 27, 2020
Division 16802463 · Feb 26, 2020
Continuation In Part 16589032 · Sep 30, 2019
Division 16030871 · Jul 10, 2018
Related Publication 20230058811A1 · Feb 23, 2023