IP Library › Granted Patent US 12,615,874
Granted Patent B2
US 12,615,874 · App. 18/038,129 · Granted Apr 28, 2026

Method for forming semiconductor structure

Inventor: Siriguleng Zhang (Beijing, CN)
Assignees: Semiconductor Manufacturing International (Beijing) Corporation; Semiconductor Manufacturing International (Shanghai) Corporation
H10F71/1395H10F30/221
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Quick Facts
Patent No.
US 12,615,874
App. No.
18/038,129
Granted
Apr 28, 2026
Kind
B2
Abstract

Method for forming a semiconductor structure includes: providing a first substrate including a first surface and second surface opposite to each other, where the first substrate includes first ions with a first concentration; forming a first epitaxial layer on the first surface of the first substrate, where the first epitaxial layer includes second ions with a second concentration smaller than the first concentration; forming a second epitaxial layer on the first epitaxial layer and a third epitaxial layer located on the second epitaxial layer, where the second epitaxial layer includes third ions with a third concentration and the third epitaxial layer includes fourth ions with a fourth concentration smaller than the third concentration; and thinning the first substrate from the second surface of the first substrate until the surface of the second epitaxial layer is exposed.

Claims (44)

1 . A method for forming a semiconductor structure, comprising:

providing a first substrate, the first substrate including a first surface and second surface opposite to each other, wherein the first substrate includes first ions and the first ions have a first concentration;

forming a first epitaxial layer on the first surface of the first substrate, wherein the first epitaxial layer includes second ions and the second ions have a second concentration and the second concentration is smaller than the first concentration;

forming a second epitaxial layer on the first epitaxial layer and a third epitaxial layer located on the second epitaxial layer, wherein: the second epitaxial layer includes third ions, the third ions have a third concentration, the third epitaxial layer includes fourth ions, the fourth ions have a fourth concentration, and the fourth concentration is smaller than the third concentration; and

thinning the first substrate from the second surface of the first substrate until a surface of the second epitaxial layer is exposed.

2 . The method according to claim 1 , wherein thinning the first substrate includes:

etching the first substrate from the second surface of the first substrate until a surface of the first epitaxial layer is exposed; and performing planarization treatment on the first epitaxial layer until the surface of the second epitaxial layer is exposed.

3 . The method according to claim 2 , wherein:

the etching is a wet etching process, and processing parameters of the wet etching include an etching solution including an HNA solution, wherein the HNA solution is a mixed solution of HF, HNO 3 , and acetic acid.

4 . The method according to claim 2 , wherein:

the planarization treatment is a chemical mechanical polishing; and processing parameters of the chemical mechanical polishing include: a polishing liquid including SiO 2 , and a polishing time of about 50 to 100 seconds.

5 . The method according to claim 1 , wherein:

the first ions have a conductive type opposite to a conductive type of the second ions.

6 . The method according to claim 5 , wherein:

the first ions are P-type ions, and the P-type ions include one or more types of boron ions, indium ions, or gallium ions.

7 . The method according to claim 5 , wherein:

the second ions are N-type ions, and the N-type ions include one or more types of phosphorus ions, arsenic ions, or antimony ions.

8 . The method according to claim 1 , wherein:

the third ions have a conductive type same as a conductive type of the fourth ions.

9 . The method according to claim 8 , wherein:

the third ions are P-type ions, and the P-type ions include one or more types of boron ions, indium ions, or gallium ions.

10 . The method according to claim 1 , wherein:

the first concentration is in a range of about 2E18˜5E18 atoms/cm 3 .

11 . The method according to claim 1 , wherein:

the second concentration is in a range of about 5E12˜1E15 atoms/cm 3 .

12 . The method according to claim 1 , wherein:

the third concentration is in a range of about 6E17˜5E18 atoms/cm 3 .

13 . The method according to claim 1 , wherein:

the fourth concentration is in a range of about 1E13˜2E14 atoms/cm 3 .

14 . The method according to claim 1 , wherein:

a thickness of the first epitaxial layer is about 1 μm to about 3 μm.

15 . The method according to claim 1 , wherein:

a thickness of the second epitaxial layer is about 1 μm to about 5 μm.

16 . The method according to claim 1 , wherein:

a thickness of the third epitaxial layer is about 4 μm to about 10 μm.

17 . The method according to claim 1 , wherein:

the third epitaxial layer includes a third surface, and the third surface faces away from the second epitaxial layer; and

before thinning the first substrate, the method further includes: forming a plurality of photoelectric doped regions in the third epitaxial layer; forming a first dielectric layer covering the third surface of the third epitaxial layer and the plurality of photoelectric doped regions; and forming an electrical interconnection structure in the first dielectric layer.

18 . The method according to claim 17 , after forming the electrical interconnection structure in the first dielectric layer, further comprising: providing a second substrate, and bonding the first surface of the first substrate to the second substrate.

19 . The method according to claim 18 , wherein:

the second epitaxial layer includes a fourth surface, wherein the fourth surface is in contact with the first epitaxial layer; and

after thinning the first substrate, the method further includes: forming a second dielectric layer on the fourth surface of the second epitaxial layer; forming a through hole in the second dielectric layer, the second epitaxial layer and the third epitaxial layer, wherein the through hole exposes the first dielectric layer; forming a contact hole at a bottom of the through hole and in the first dielectric layer, exposing the electrical interconnection structure; and forming a conductive layer in the through hole and the contact hole.

20 . The method according to claim 19 , further comprising:

forming a plurality of optical filters on the second dielectric layer and lenses on the plurality of optical filters.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 22, 2023
From: ZHANG, SIRIGULENG
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION; SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 064251/0232 →
Continuity (1)
Related Publication 20240063325A1 · Feb 22, 2024
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