Semiconductor device
Provided is a semiconductor device including a semiconductor substrate having a transistor portion and a diode portion; and an emitter electrode and a gate electrode provided above a front surface of the semiconductor substrate, wherein the transistor portion has a plurality of trench portions electrically connected to the gate electrode, a drift region of a first conductivity type provided in the semiconductor substrate, a base region of a second conductivity type provided above the drift region, and a trench bottom barrier region of a second conductivity type provided between the drift region and the base region and having a higher doping concentration than that of the base region, and the trench bottom barrier region is electrically connected to the emitter electrode.
1 . A semiconductor device comprising:
a semiconductor substrate having a transistor portion and a diode portion; and
an emitter electrode and a gate electrode provided above a front surface of the semiconductor substrate, wherein
the transistor portion has:
a plurality of trench portions electrically connected to the gate electrode;
a drift region of a first conductivity type provided in the semiconductor substrate;
a base region of a second conductivity type provided above the drift region; and a trench bottom barrier region of a second conductivity type provided between the drift region and the base region and having a higher doping concentration than that of the base region, and
the trench bottom barrier region is electrically connected to the emitter electrode, wherein
in a depth direction of the semiconductor substrate, a lower end of the trench bottom barrier region is positioned below bottom portions of the plurality of trench portions.
2 . The semiconductor device according to claim 1 , wherein
the trench bottom barrier region is provided in a region adjacent to the diode portion, in a top view of the semiconductor substrate.
3 . The semiconductor device according to claim 2 , wherein
a width of the trench bottom barrier region in an array direction of the plurality of trench portions is 2 μm or more and 100 μm or less.
4 . The semiconductor device according to claim 3 , wherein
the width of the trench bottom barrier region is 10 μm or more and 50 μm or less.
5 . The semiconductor device according to claim 3 , wherein
the doping concentration of the trench bottom barrier region is 1E11 cm −3 or more and 1E13 cm −3 or less.
6 . The semiconductor device according to claim 2 , wherein
the doping concentration of the trench bottom barrier region is 1E11 cm −3 or more and 1E13 cm −3 or less.
7 . The semiconductor device according to claim 2 , wherein
the transistor portion has an accumulation region of a first conductivity type provided above the trench bottom barrier region and having a higher doping concentration than that of the drift region.
8 . The semiconductor device according to claim 2 , wherein
the transistor portion further has:
a well region of a second conductivity type provided on the front surface of the semiconductor substrate and extending along an outer circumference of an active region; and
an interlayer dielectric film provided above the semiconductor substrate, the trench bottom barrier region is connected to the well region, and the well region is electrically connected to the emitter electrode.
9 . The semiconductor device according to claim 1 , wherein
the doping concentration of the trench bottom barrier region is 1E11 cm −3 or more and 1E13 cm −3 or less.
10 . The semiconductor device according to claim 1 , wherein
the transistor portion has an accumulation region of a first conductivity type provided above the trench bottom barrier region and having a higher doping concentration than that of the drift region.
11 . The semiconductor device according to claim 10 , wherein
the drift region and the accumulation region are further provided to the diode portion.
12 . The semiconductor device according to claim 1 , wherein
the transistor portion further has:
a well region of a second conductivity type provided on the front surface of the semiconductor substrate and extending along an outer circumference of an active region; and
an interlayer dielectric film provided above the semiconductor substrate, the trench bottom barrier region is connected to the well region, and the well region is electrically connected to the emitter electrode.
13 . The semiconductor device according to claim 12 , wherein
some of a plurality of mesa portions positioned above the trench bottom barrier region are electrically connected to the emitter electrode via a contact hole provided in the interlayer dielectric film.
14 . The semiconductor device according to claim 13 , wherein
the transistor portion further has a floating barrier region of a second conductivity type provided between the drift region and the base region and electrically floating.
15 . The semiconductor device according to claim 12 , wherein
the transistor portion further has a floating barrier region of a second conductivity type provided between the drift region and the base region and electrically floating.
16 . The semiconductor device according to claim 15 , wherein
in an array direction of the plurality of trench portions, a distance between the trench bottom barrier region and the floating barrier region is equal to or greater than a pitch of the plurality of trench portions and 10 μm or less.
17 . The semiconductor device according to claim 16 , wherein
in an extension direction of the plurality of trench portions, a distance between the well region and the floating barrier region is equal to or greater than the pitch and 10 μm or less.
18 . A semiconductor device comprising:
a semiconductor substrate having a front surface, a transistor portion and a diode portion; and
an emitter electrode and a gate electrode provided above the front surface of the semiconductor substrate, wherein
the transistor portion has:
a plurality of trench portions electrically connected to the gate electrode;
a drift region of a first conductivity type provided in the semiconductor substrate;
a base region of a second conductivity type provided above the drift region;
an emitter region of the first conductivity type having an upper surface coincident with the front surface of the semiconductor substrate; and
a trench bottom barrier region of a second conductivity type provided between the drift region and the base region and having a higher doping concentration than that of the base region, and
the trench bottom barrier region is electrically connected to the emitter electrode, wherein
the transistor portion further has:
a well region of a second conductivity type provided on the front surface of the semiconductor substrate and extending along an outer circumference of an active region, wherein the emitter region is not provided on the well region; and
an interlayer dielectric film provided above the semiconductor substrate, the trench bottom barrier region is connected to the well region, and the well region is electrically connected to the emitter electrode.
19 . A semiconductor device comprising:
a semiconductor substrate having a front surface, a transistor portion and a diode portion; and
an emitter electrode and a gate electrode provided above the front surface of the semiconductor substrate, wherein
the transistor portion has:
a plurality of trench portions electrically connected to the gate electrode;
a drift region of a first conductivity type provided in the semiconductor substrate;
a base region of a second conductivity type provided above the drift region;
an emitter region of the first conductivity type having an upper surface coincident with the front surface of the semiconductor substrate; and
a trench bottom barrier region of a second conductivity type provided between the drift region and the base region and having a higher doping concentration than that of the base region, and
the trench bottom barrier region is electrically connected to the emitter electrode, wherein
the transistor portion further has:
a well region of a second conductivity type provided on the front surface of the semiconductor substrate and extending along an outer circumference of an active region, wherein the emitter region is not provided on the well region; and
an interlayer dielectric film provided above the semiconductor substrate,
the trench bottom barrier region is connected to the well region,
the well region is electrically connected to the emitter electrode, and
the trench bottom barrier region is provided in a region adjacent to the diode portion, in a top view of the semiconductor substrate.