Voltage controlled magnetic anisotropy (VCMA) memory devices including platinum containing layer in contact with free layer
A memory device includes a first electrode, a second electrode, and a magnetic tunnel junction located between the first electrode and the second electrode. The magnetic tunnel junction includes a reference layer, a free layer, a nonmagnetic tunnel barrier layer located between the reference layer and the free layer, and a platinum-containing layer containing platinum and at least one element selected from iridium, hafnium or ruthenium. The platinum-containing layer contacts the free layer.
1. A memory device, comprising:
a first electrode;
a second electrode; and
a magnetic tunnel junction located between the first electrode and the second electrode and comprising:
a reference layer;
a free layer;
a nonmagnetic tunnel barrier layer located between the reference layer and the free layer; and
a platinum-containing layer comprising platinum and at least one element selected from iridium, hafnium or ruthenium, wherein the platinum-containing layer contacts the free layer.
2. The memory device of claim 1 , wherein the platinum-containing layer comprises an alloy of the platinum and the at least one element selected from iridium, hafnium or ruthenium.
3. The memory device of claim 1 , wherein the platinum-containing layer comprises a layer stack of a first sublayer comprising the platinum and a second sublayer comprising the at least one element selected from iridium, hafnium or ruthenium.
4. The memory device of claim 1 , wherein the platinum-containing layer comprises a first sublayer comprising platinum and having a thickness less than 1 nm intermixed with a second sublayer comprising the at least one element selected from iridium, hafnium or ruthenium and having a thickness less than 1 nm.
5. The memory device of claim 1 , wherein:
the platinum-containing layer comprises platinum atoms at an atomic fraction in a range from 0.2 to 0.8;
the platinum-containing layer comprises iridium, hafnium, or ruthenium at an atomic fraction in a range from 0.2 to 0.8; and
the platinum-containing layer has a thickness in a range from 0.1 nm to 0.4 nm.
6. The memory device of claim 1 , wherein the memory device further comprises a dielectric capping layer located between the free layer and the second electrode.
7. The memory device of claim 6 , wherein the platinum-containing layer directly contacts the nonmagnetic tunnel barrier layer, and the dielectric capping layer is spaced from the platinum-containing layer by the free layer.
8. The memory device of claim 6 , wherein the platinum-containing layer does not directly contact the nonmagnetic tunnel barrier layer, and the dielectric capping layer is in direct contact with the platinum-containing layer.
9. The memory device of claim 1 , wherein the at least one element selected from iridium, hafnium or ruthenium comprises the iridium.
10. The memory device of claim 1 , wherein the at least one element selected from iridium, hafnium or ruthenium comprises the hafnium.
11. The memory device of claim 1 , wherein the memory device comprises a voltage controlled magnetic anisotropy magnetic memory device.
12. A memory device, comprising:
a first electrode;
a second electrode; and
a magnetic tunnel junction located between the first electrode and the second electrode and comprising:
a reference layer;
a free layer;
a nonmagnetic tunnel barrier layer located between the reference layer and the free layer;
a platinum layer contacting a first surface of the free layer; and
a metal layer comprising at least one element selected from iridium or hafnium and contacting a second surface of the free layer.
13. The memory device of claim 12 , wherein the metal layer consists essentially of the iridium.
14. The memory device of claim 12 , wherein the metal layer consists essentially of the hafnium.
15. The memory device of claim 12 , wherein:
the platinum layer has a thickness in a range from 0.05 nm to 0.3 nm; and
the metal layer has a thickness in a range from 0.05 nm to 0.3 nm.
16. The memory device of claim 12 , wherein the platinum layer directly contacts the nonmagnetic tunnel barrier layer.
17. The memory device of claim 12 , wherein the metal layer directly contacts the nonmagnetic tunnel barrier layer.
18. The memory device of claim 12 , wherein:
the memory device further comprises a dielectric capping layer located between the free layer and the second electrode; and
the dielectric capping layer is in direct contact with the metal layer.
19. The memory device of claim 12 , wherein:
the memory device further comprises a dielectric capping layer located between the free layer and the second electrode; and
the dielectric capping layer is in direct contact with the platinum layer.
20. The memory device of claim 12 , wherein the memory device comprises a voltage controlled magnetic anisotropy magnetic memory device.