IP Library › Granted Patent US 12,628,416
Granted Patent B2
US 12,628,416 · App. 18/136,485 · Granted May 12, 2026

Semiconductor device and manufacturing method thereof

Inventors: Hung-Yu Yen (Hsinchu, TW); Keng-Chu Lin (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H10D84/853H10D30/024H10D30/6211H10D84/0193H10D84/038
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Quick Facts
Patent No.
US 12,628,416
App. No.
18/136,485
Granted
May 12, 2026
Kind
B2
Abstract

A semiconductor device includes a substrate, a plurality of active structures, a trench, a lower epitaxy, an upper epitaxy and a bottom barrier portion. The active structures are formed on the substrate and arranged in a first direction. The trench passes through adjacent two of the active structures in a second direction and has a bottom recess. The lower epitaxy is formed on a lower portion of the trench. The upper epitaxy is formed on an upper portion of the trench and separated from the lower epitaxy. The bottom barrier portion is formed on the bottom recess and separates the substrate and the lower epitaxy.

Claims (69)

1 . A manufacturing method for a semiconductor device, comprising:

forming a fin structure on a substrate, wherein the fin structure extends in a first direction;

forming a trench passing through the fin structure to form a plurality of active structures, wherein the trench extends, in a second direction and has a bottom recess;

forming a bottom barrier portion formed on the bottom recess of the trench;

forming a lower epitaxy on a lower portion of the trench;

forming a CESL (contact etching stop layer) portion and a ILD (interlayer dielectric) portion within the trench; and

forming an upper epitaxy on an upper portion of the trench, wherein the upper epitaxy is separated from the lower epitaxy;

wherein in forming the CESL portion and the ILD portion within the trench, the manufacturing method further comprises:

forming a CESL material in the trench;

forming a ILD material on the CESL material, wherein the CESL material covers a bottom surface of the ILD material and a lateral surface of the ILD material;

in the same process, removing a portion of the CESL material and a portion of the ILD material, wherein a remaining portion of the CESL material forms the CESL portion and a remaining portion of the ILD material forms the ILD portion.

2 . The manufacturing method as claimed in claim 1 , further comprising:

forming a barrier layer material on a lateral surface of the trench and a sidewall of the bottom recess; and

densifying a portion of the barrier layer material to form a barrier layer;

wherein the barrier layer has a density greater than that of the barrier layer material.

3 . The manufacturing method as claimed in claim 2 , wherein each active structure comprises an upper active region, a lower active region and a middle spacer separating the upper active region from the lower active region; the barrier layer comprises:

the bottom barrier portion located below the middle spacer; and

an upper barrier portion located above the middle spacer.

4 . The manufacturing method as claimed in claim 3 , wherein another portion of the barrier layer material is remained to form a remained barrier portion, and the remained barrier portion is located between the bottom barrier portion and the upper barrier portion.

5 . The manufacturing method as claimed in claim 4 , further comprising:

removing the remained barrier portion to expose the lower active region; and

forming the lower epitaxy on the lower portion of the trench corresponding to the lower active region.

6 . The manufacturing method as claimed in claim 1 , wherein each active structure comprises an upper active region, a lower active region and a middle spacer separating the upper active region from the lower active region; the manufacturing method further comprises:

removing the middle spacer to form a hollow portion; and

forming a middle inner spacer within the hollow portion.

7 . The manufacturing method as claimed in claim 3 , wherein the barrier layer comprises:

a middle barrier portion formed on a lateral surface of the middle spacer;

wherein the middle barrier portion extends from the upper barrier portion toward a lower surface of the middle spacer, but not extends to the lower surface of the middle spacer.

8 . The manufacturing method as claimed in claim 3 , further comprising:

removing the upper barrier portion to expose the upper active region; and

forming the upper epitaxy on the upper portion of the trench corresponding to the upper active region.

9 . The manufacturing method as claimed in claim 3 wherein the barrier layer comprises:

a middle barrier portion formed on a lateral surface of the middle spacer;

wherein the middle barrier portion has a bottom surface aligned with au upper surface of the middle spacer.

10 . A manufacturing method for a semiconductor device, comprising:

forming a fin structure on a substrate, wherein the fin structure extends in a first direction;

forming a trench passing through the fin structure to form a plurality of active structures, wherein the trench extends, in a second direction;

forming a lower epitaxy on a lower portion of the trench;

forming a CESL portion and a ILD portion within the trench; and

forming an upper epitaxy on an upper portion of the trench, wherein the upper epitaxy is separated from the lower epitaxy by the CESL portion and the ILD portion;

wherein in forming the CESL portion and the ILD portion within the trench, the manufacturing method further comprises:

forming a CESL material in the trench;

forming a ILD material on the CESL material, wherein the CESL material covers a bottom surface of the ILD material and a lateral surface of the ILD material;

in the same process, removing a portion of the CESL material and a portion of the ILD material, wherein a remaining portion of the CESL material forms the CESL portion and a remaining portion of the ILD material forms the ILD portion.

11 . The manufacturing method as claimed in claim 10 , further comprises:

before forming the lower epitaxy on the lower portion of the trench, forming a middle barrier portion within the trench.

12 . The manufacturing method as claimed in claim 11 , wherein in forming the middle barrier portion within the trench, the middle barrier portion is formed on a lateral surface of the CESL portion.

13 . The manufacturing method as claimed in claim 10 , further comprising:

before forming the lower epitaxy on the lower portion of the trench, forming a bottom barrier portion in the trench.

14 . The manufacturing method as claimed in claim 13 , wherein in forming the trench passing through the fin structure to form the plurality of active structure, the trench has a bottom recess; the manufacturing method further comprises:

before forming the lower epitaxy on the lower portion of the trench, forming the bottom barrier portion in the bottom recess of the trench.

15 . The manufacturing method as claimed in claim 13 , wherein the bottom barrier portion and the middle barrier portion are formed of the same material.

16 . A manufacturing method for a semiconductor device, comprising:

forming a fin structure on a substrate, wherein the fin structure extends in a first direction;

forming a trench passing through the fin structure to form a plurality of active structures, wherein the trench extends, in a second direction;

forming a lower epitaxy on a lower portion of the trench;

forming a CESL material in the trench;

forming a ILD material in the trench;

in the same process, removing a portion of the CESL material to form a CESL portion and removing a portion of the ILD material to form an ILD portion;

forming an upper epitaxy on an upper portion of the trench, wherein the upper epitaxy is separated from the lower epitaxy by the CESL portion and the ILD portion.

17 . The manufacturing method as claimed in claim 16 , further comprising:

before forming the CESL material in the trench, forming an upper barrier portion in the trench.

18 . The manufacturing method as claimed in claim 16 , further comprising:

forming a middle barrier portion; and

forming a middle inner spacer in the active structure, wherein the middle inner spacer has a lower surface;

wherein the middle barrier portion extends toward the lower surface of the middle inner spacer, but not to the lower surface of the middle inner spacer.

19 . The manufacturing method as claimed in claim 16 , further comprising:

before forming the lower epitaxy on the lower portion of the trench, forming a bottom barrier portion in the trench.

20 . The manufacturing method as claimed in claim 19 , wherein the bottom barrier portion and a middle barrier portion are formed of the same material.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR'S EXECUTION DATES PREVIOUSLY RECORDED ON REEL 063389 FRAME 0555. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jan 2, 2024
From: YEN, HUNG-YU; LIN, KENG-CHU
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 066177/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2023
From: YEN, HUNG-YU; LIN, KENG-CHU
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 063389/0555 →
Continuity (1)
Related Publication 20240355825A1 · Oct 24, 2024
References Cited (3)
US 11362091B2 · Fulford · 2022 [cited by examiner]
US 20070148903A1 · Kim · 2007 [cited by examiner]
US 20240030284A1 · Kang · 2024 [cited by examiner]